[coreboot-gerrit] Change in coreboot[master]: vendorcode/intel/FSP2_0/CPX-SP: update to ww36

[Jonathan Zhang (Code Review)]

Hello build bot (Jenkins), Paul Menzel, Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45100

to look at the new patch set (#3).

Change subject: vendorcode/intel/FSP2_0/CPX-SP: update to ww36
......................................................................

vendorcode/intel/FSP2_0/CPX-SP: update to ww36

Intel CPX-SP FSP ww36 release has following changes:
* Update FSP header version to change among FSP releases.
* Add SPDRegVen field in memory map HOB, to facilitate SMBIOS type 11
(OEM strings) generation.

Signed-off-by: Jonathan Zhang 
Change-Id: I7a8dab3987c2f8f471b40f7b3b9ced0c2909271d
---
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspmUpd.h
M src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
2 files changed, 11 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/45100/3