[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/skylake: Unify serial IRQ options

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31596 )

Change subject: soc/intel/skylake: Unify serial IRQ options
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Patch Set 2:

(1 comment)

https://review.coreboot.org/#/c/31596/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/31596/2//COMMIT_MSG@20 
PS2, Line 20: A lot of Google boards have serial IRQ enabled, while the pin
            : seems to be unconnected?
> Ah yes, all those are boards with eSPI which uses virtual wires for SERIRQ# instead of the physical  […]

As per BWG section 6.3, i could see this programming is recommended only for LPC