[coreboot-gerrit] New patch to review for coreboot: e11f15d armv7: change some unsigned ints to uint32_t

[David Hendricks]

David Hendricks ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2983

-gerrit

commit e11f15d9c6c21901048d3b8bd7f714b89b65e015
Author: David Hendricks 
Date:   Fri Mar 29 15:40:34 2013 -0700

armv7: change some unsigned ints to uint32_t

Use register-sized types in case the inline assembler somehow doesn't.

Change-Id: I3202ba972ef2548323fe557f45dc4b0b1cf6c818
    Signed-off-by: David Hendricks 
---
 src/arch/armv7/include/arch/cache.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/arch/armv7/include/arch/cache.h b/src/arch/armv7/include/arch/cache.h
index 3e0ff2e..1db86dc 100644
--- a/src/arch/armv7/include/arch/cache.h
+++ b/src/arch/armv7/include/arch/cache.h
@@ -220,9 +220,9 @@ static inline void write_csselr(uint32_t val)
 }

/* read L2 control register (L2CTLR) */
-static inline unsigned int read_l2ctlr(void)
+static inline uint32_t read_l2ctlr(void)
 {
-	unsigned int val = 0;
+	uint32_t val = 0;
    asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
    return val;
 }
@@ -239,9 +239,9 @@ static inline void write_l2ctlr(uint32_t val)
 }

/* read system control register (SCTLR) */
-static inline unsigned int read_sctlr(void)
+static inline uint32_t read_sctlr(void)
 {
-	unsigned int val;
+	uint32_t val;
    asm volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r" (val));
    return val;
 }