Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/23720
Change subject: mainboard/google/meowth: Turn on SAR features ......................................................................
mainboard/google/meowth: Turn on SAR features
TEST=None
Change-Id: I8dafa19da05102258e853512b2f4cf85f0876d21 Signed-off-by: Lijian Zhao lijian.zhao@intel.com --- M src/mainboard/google/zoombini/Kconfig M src/mainboard/google/zoombini/variants/meowth/devicetree.cb 2 files changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/23720/1
diff --git a/src/mainboard/google/zoombini/Kconfig b/src/mainboard/google/zoombini/Kconfig index 64180f3..1d3fe35 100644 --- a/src/mainboard/google/zoombini/Kconfig +++ b/src/mainboard/google/zoombini/Kconfig @@ -44,6 +44,11 @@ default "MEOWTH TEST 5868" if BOARD_GOOGLE_MEOWTH default "ZOOMBINI TEST 5722" if BOARD_GOOGLE_ZOOMBINI
+config CHROMEOS + select DSAR_ENABLE + select SAR_ENABLE + select USE_SAR + config MAINBOARD_DIR string default "google/zoombini" diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb index 88de878..bb6f785 100644 --- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb +++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb @@ -62,6 +62,12 @@ device pci 12.6 off end # GSPI #2 device pci 14.0 on end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) + device pci 14.3 on + chip drivers/intel/wifi + register "wake" = "GPE0_PME_B0" + device pci 00.0 on end + end + end # CNVi wifi device pci 14.5 off end # SDCard device pci 15.0 on end # I2C #0 device pci 15.1 on end # I2C #1