[coreboot-gerrit] Change in coreboot[master]: soc/intel/braswell: Attempt to fix the google FSP binary not booting

[Frans Hendriks (Code Review)]

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36198 )

Change subject: soc/intel/braswell: Attempt to fix the google FSP binary not booting
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Patch Set 1:

(2 comments)

Patchset works fine on Facebook FBG1701.

https://review.coreboot.org/c/coreboot/+/36198/1/src/drivers/intel/fsp1_1/ca... 
File src/drivers/intel/fsp1_1/cache_as_ram.S:

https://review.coreboot.org/c/coreboot/+/36198/1/src/drivers/intel/fsp1_1/ca... 
PS1, Line 83: update_microcode:
Why not have FSP updating the microcode?

https://review.coreboot.org/c/coreboot/+/36198/1/src/drivers/intel/fsp1_1/ca... 
PS1, Line 244: 	.long	CONFIG_CPU_MICROCODE_CBFS_LOC		/* Microcode Location */
Is this real cause of the issue? If microcode is dynamically added, CPU_MICROCODE_CBFS_LOC is not correct. The updated_bsp_microcde uses CBFS location for microcode location.