Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43332 )
Change subject: soc/amd/picasso: Add support for DRIVERS_USB_PCI_XHCI ......................................................................
soc/amd/picasso: Add support for DRIVERS_USB_PCI_XHCI
This provides the functionality to provide the GPE to the pci_xhci driver.
BUG=b:154756391 TEST=Made sure trembyle compiles
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ice7203831a1f65ed32f3a6392fe02c4b17d42617 --- M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc A src/soc/amd/picasso/include/soc/mainboard.h A src/soc/amd/picasso/mainboard.c A src/soc/amd/picasso/xhci.c 5 files changed, 85 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/43332/1
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 4d07af6..1e7f3ef 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -18,6 +18,7 @@ select X86_AMD_INIT_SIPI select ACPI_AMD_HARDWARE_SLEEP_VALUES select DRIVERS_I2C_DESIGNWARE + select DRIVERS_USB_PCI_XHCI select GENERIC_GPIO_LIB select IDT_IN_EVERY_STAGE select IOAPIC diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 060f78d..45ded6d 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -77,6 +77,8 @@ ramstage-y += config.c ramstage-y += update_microcode.c ramstage-y += graphics.c +ramstage-y += mainboard.c +ramstage-y += xhci.c
smm-y += smihandler.c smm-y += smi_util.c diff --git a/src/soc/amd/picasso/include/soc/mainboard.h b/src/soc/amd/picasso/include/soc/mainboard.h new file mode 100644 index 0000000..55154d8 --- /dev/null +++ b/src/soc/amd/picasso/include/soc/mainboard.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __PICASSO_MAINBOARD_H__ +#define __PICASSO_MAINBOARD_H__ + +#include <stddef.h> +#include <soc/smi.h> + +/* + * Returns the GPE table for non GPIO devices. + * i.e., GEVENTS above 23 + */ +const struct sci_source *mainboard_get_gpe_table(size_t *num); + +#endif /* __PICASSO_MAINBOARD_H__ */ diff --git a/src/soc/amd/picasso/mainboard.c b/src/soc/amd/picasso/mainboard.c new file mode 100644 index 0000000..717a579 --- /dev/null +++ b/src/soc/amd/picasso/mainboard.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/mainboard.h> + +__weak const struct sci_source *mainboard_get_gpe_table(size_t *num) +{ + return NULL; +} diff --git a/src/soc/amd/picasso/xhci.c b/src/soc/amd/picasso/xhci.c new file mode 100644 index 0000000..9f3ea9b --- /dev/null +++ b/src/soc/amd/picasso/xhci.c @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <device/device.h> +#include <drivers/usb/pci_xhci/pci_xhci.h> +#include <soc/mainboard.h> +#include <soc/pci_devs.h> + +static const struct sci_source *get_matching_sci_source(unsigned int sci_type) +{ + const struct sci_source *sci_sources, *sci_source; + size_t sci_count; + unsigned int i; + + sci_sources = mainboard_get_gpe_table(&sci_count); + + if (!sci_sources) + return NULL; + + for (i = 0; i < sci_count; ++i) { + sci_source = &sci_sources[i]; + if (sci_source->scimap == sci_type) + return sci_source; + } + + return NULL; +} + +enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe) +{ + const struct sci_source *sci_source; + unsigned int sci_type; + + if (dev->bus->dev->path.type != DEVICE_PATH_PCI) + return CB_ERR_ARG; + + if (dev->bus->dev->path.pci.devfn != PCIE_GPP_A_DEVFN) + return CB_ERR_ARG; + + if (dev->path.type != DEVICE_PATH_PCI) + return CB_ERR_ARG; + + if (dev->path.pci.devfn == XHCI0_DEVFN) + sci_type = SMITYPE_XHC0_PME; + else if (dev->path.pci.devfn == XHCI1_DEVFN) + sci_type = SMITYPE_XHC1_PME; + else + return CB_ERR_ARG; + + sci_source = get_matching_sci_source(sci_type); + + if (!sci_source) { + *gpe = -1; + return CB_SUCCESS; + } + + *gpe = sci_source->gpe; + return CB_SUCCESS; +}