Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35891 )
Change subject: src/southbridge/amd/pi/hudson/sata.c: set SATA in AHCI mode ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35891/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35891/1//COMMIT_MSG@10 PS1, Line 10: Changing SATA mode from IDE to AHCI solved that issue.
Of course it deals with IDE mode, however, the pfSense software seems not to be robust. […]
So the Linux kernel does not have a problem, and it is a …BSD issue?
Please improve the commit message accordingly. (Also with the information from your other comments.)
https://review.coreboot.org/c/coreboot/+/35891/1/src/southbridge/amd/pi/huds... File src/southbridge/amd/pi/hudson/sata.c:
https://review.coreboot.org/c/coreboot/+/35891/1/src/southbridge/amd/pi/huds... PS1, Line 51: /* enable AHCI mode */
Firstly, we do not use CMOS runtime configuration for this board. […]
ad 1) The commit deals with the south bridge, and not a specific board, doesn’t it? (The commit message also fails to mention that.)
ad 2) This should be fixed then.