[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Skip Gpio configuration from FSP

[Srinidhi N Kaushik (Code Review)]

Srinidhi N Kaushik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44913 )

Change subject: soc/intel/tigerlake: Skip Gpio configuration from FSP
......................................................................

soc/intel/tigerlake: Skip Gpio configuration from FSP

FSP v3333 or later, provides a new UPD to Skip configuring
Gpio settings from FSP. Coreboot should provide all the
required Gpio configuration for the platform when this UPD
is set.

BUG=b:166790597, 146390704
BRANCH=none
TEST=build and boot volteer proto2

Signed-off-by: Srinidhi N Kaushik 
Change-Id: If32f35a188d510db8e4d8973cae78297d49a9240
---
M src/soc/intel/tigerlake/romstage/fsp_params.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/44913/1

diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c
index 2ba276d..4b68cb6 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params.c
@@ -87,6 +87,9 @@
    dev = pcidev_path_on_root(PCH_DEVFN_ISH);
    m_cfg->PchIshEnable = is_dev_enabled(dev);

+	/* Skip GPIO configuration from FSP */
+	m_cfg->GpioOverride = 0x1;
+
    /* DP port config */
    m_cfg->DdiPortAConfig = config->DdiPortAConfig;
    m_cfg->DdiPortBConfig = config->DdiPortBConfig;