Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8348
-gerrit
commit 3aa55479293d38a9f94e036b84656a7d1de5a7cb Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Wed Feb 4 13:49:07 2015 +0200
AMD amdfam10: Always have HT3_SUPPORT
Change-Id: I6ce784fd9e7a6876a37c910c503fafa3a17bf96f Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/cpu/amd/socket_AM2r2/Kconfig | 1 - src/cpu/amd/socket_AM3/Kconfig | 1 - src/cpu/amd/socket_ASB2/Kconfig | 1 - src/cpu/amd/socket_C32/Kconfig | 1 - src/mainboard/msi/ms9652_fam10/Kconfig | 4 ---- src/northbridge/amd/amdfam10/Kconfig | 4 ---- src/northbridge/amd/amdfam10/northbridge.c | 17 ++++------------- 7 files changed, 4 insertions(+), 25 deletions(-)
diff --git a/src/cpu/amd/socket_AM2r2/Kconfig b/src/cpu/amd/socket_AM2r2/Kconfig index 2c56ea7..60b11bf 100644 --- a/src/cpu/amd/socket_AM2r2/Kconfig +++ b/src/cpu/amd/socket_AM2r2/Kconfig @@ -1,7 +1,6 @@ config CPU_AMD_SOCKET_AM2R2 bool select CPU_AMD_MODEL_10XXX - select HT3_SUPPORT select PCI_IO_CFG_EXT select X86_AMD_FIXED_MTRRS
diff --git a/src/cpu/amd/socket_AM3/Kconfig b/src/cpu/amd/socket_AM3/Kconfig index 48dba03..4f61685 100644 --- a/src/cpu/amd/socket_AM3/Kconfig +++ b/src/cpu/amd/socket_AM3/Kconfig @@ -1,7 +1,6 @@ config CPU_AMD_SOCKET_AM3 bool select CPU_AMD_MODEL_10XXX - select HT3_SUPPORT select PCI_IO_CFG_EXT select X86_AMD_FIXED_MTRRS
diff --git a/src/cpu/amd/socket_ASB2/Kconfig b/src/cpu/amd/socket_ASB2/Kconfig index eb2bdc8..28779f5 100644 --- a/src/cpu/amd/socket_ASB2/Kconfig +++ b/src/cpu/amd/socket_ASB2/Kconfig @@ -1,7 +1,6 @@ config CPU_AMD_SOCKET_ASB2 bool select CPU_AMD_MODEL_10XXX - select HT3_SUPPORT select PCI_IO_CFG_EXT select X86_AMD_FIXED_MTRRS
diff --git a/src/cpu/amd/socket_C32/Kconfig b/src/cpu/amd/socket_C32/Kconfig index 05da489..65d1cbb 100644 --- a/src/cpu/amd/socket_C32/Kconfig +++ b/src/cpu/amd/socket_C32/Kconfig @@ -1,7 +1,6 @@ config CPU_AMD_SOCKET_C32_NON_AGESA bool select CPU_AMD_MODEL_10XXX - select HT3_SUPPORT select PCI_IO_CFG_EXT select X86_AMD_FIXED_MTRRS
diff --git a/src/mainboard/msi/ms9652_fam10/Kconfig b/src/mainboard/msi/ms9652_fam10/Kconfig index f7d99f8..0b45db3 100644 --- a/src/mainboard/msi/ms9652_fam10/Kconfig +++ b/src/mainboard/msi/ms9652_fam10/Kconfig @@ -89,10 +89,6 @@ config APIC_ID_OFFSET hex default 0x00
-config HT3_SUPPORT - bool - default y - config MCP55_PCI_E_X_0 int default 1 diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index 13b912e..071557a 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -32,10 +32,6 @@ config AGP_APERTURE_SIZE hex default 0x4000000
-config HT3_SUPPORT - bool - default y - config AMDMCT bool default y diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 40de13d..8f6d6f9 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -152,7 +152,6 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, u32 s u32 ht_unitid_base[4]; // here assume only 4 HT device on chain u32 max_bus; u32 min_bus; - u32 is_sublink1 = (link->link_num > 3); device_t devx; u32 busses; u32 segn = max>>8; @@ -161,18 +160,16 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, u32 s #endif u32 max_devfn;
-#if CONFIG_HT3_SUPPORT - if(is_sublink1) { + if (link->link_num > 3) { u32 regpos; u32 reg; regpos = 0x170 + 4 * (link->link_num & 3); // it is only on sublink0 reg = pci_read_config32(dev, regpos); if(reg & 1) return max; // already ganged no sblink1 devx = get_node_pci(nodeid, 4); - } else -#endif + } else { devx = dev; - + }
link->cap = 0x80 + ((link->link_num & 3) * 0x20); do { @@ -1322,13 +1319,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) /* Ok, We need to set the links for that device. * otherwise the device under it will not be scanned */ - int linknum; -#if CONFIG_HT3_SUPPORT - linknum = 8; -#else - linknum = 4; -#endif - add_more_links(cdb_dev, linknum); + add_more_links(cdb_dev, 8); }
cores_found = 0; // one core