Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44102
to look at the new patch set (#3).
Change subject: [WIP]mb/intel/minnowmax: Add mainboard ......................................................................
[WIP]mb/intel/minnowmax: Add mainboard
TODO: - Fixup SPD handling (random one from rambi is used now), - Check enabled PCI devices (vendor disables most, this is the config the FSP port used) - Remove microcode inclusion 'workaround/fix' once 3rdparty/blobs is updated in master
Working: - USB (EHCI and XHCI) - SATA - UART - ethernet - booting Linux 5.4 - S3 resume + suspend
Untested: - SD card - Display output
Change-Id: I9a1236425c8a0914f92adcad445230ef2692393a Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- A src/mainboard/intel/minnowmax/Kconfig A src/mainboard/intel/minnowmax/Kconfig.name A src/mainboard/intel/minnowmax/Makefile.inc A src/mainboard/intel/minnowmax/acpi/ec.asl A src/mainboard/intel/minnowmax/acpi/mainboard.asl A src/mainboard/intel/minnowmax/acpi/superio.asl A src/mainboard/intel/minnowmax/acpi_tables.c A src/mainboard/intel/minnowmax/board_info.txt A src/mainboard/intel/minnowmax/cmos.layout A src/mainboard/intel/minnowmax/data.vbt A src/mainboard/intel/minnowmax/devicetree.cb A src/mainboard/intel/minnowmax/dsdt.asl A src/mainboard/intel/minnowmax/gpio.c A src/mainboard/intel/minnowmax/irqroute.c A src/mainboard/intel/minnowmax/irqroute.h A src/mainboard/intel/minnowmax/mainboard.c A src/mainboard/intel/minnowmax/romstage.c A src/mainboard/intel/minnowmax/spd/micron_2GiB_dimm_MT41K256M16HA-125.spd.hex M src/soc/intel/baytrail/Makefile.inc 19 files changed, 621 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/44102/3