Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32446 )
Change subject: soc/intel: Add GPI interrupt config register offset info
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Patch Set 1: -Code-Review
(2 comments)
https://review.coreboot.org/#/c/32446/1/src/soc/intel/denverton_ns/gpio.c
File src/soc/intel/denverton_ns/gpio.c:
https://review.coreboot.org/#/c/32446/1/src/soc/intel/denverton_ns/gpio.c@99
PS1, Line 99: R_PCH_PCR_GPIO_SC_GPI_IS
R_PCH_PCR_GPIO_SC_DFX_GPI_IS
https://review.coreboot.org/#/c/32446/1/src/soc/intel/denverton_ns/gpio.c@10...
PS1, Line 100: .gpi_int_en_reg_0 = R_PCH_PCR_GPIO_SC_GPI_IE,
R_PCH_PCR_GPIO_SC_DFX_GPI_IE
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I8af877a734e8d49b700d720b736da8764985a8f8
Gerrit-Change-Number: 32446
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