[coreboot-gerrit] Change in coreboot[master]: reset: Convert individual boards to `board_reset()`

12 Oct 2018

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/29048
Change subject: reset: Convert individual boards to `board_reset()`
......................................................................
reset: Convert individual boards to `board_reset()`
Change-Id: I6182da172ae2f4107a9b5d8190e4b3b10ed2f0b9
Signed-off-by: Nico Huber nico.h@gmx.de
---
M src/mainboard/google/foster/pmic.c
M src/mainboard/google/foster/reset.c
M src/mainboard/google/gale/Kconfig
M src/mainboard/google/gale/reset.c
M src/mainboard/google/nyan/pmic.c
M src/mainboard/google/nyan/reset.c
M src/mainboard/google/nyan/romstage.c
M src/mainboard/google/nyan_big/pmic.c
M src/mainboard/google/nyan_big/reset.c
M src/mainboard/google/nyan_big/romstage.c
M src/mainboard/google/nyan_blaze/pmic.c
M src/mainboard/google/nyan_blaze/reset.c
M src/mainboard/google/nyan_blaze/romstage.c
M src/mainboard/google/purin/Kconfig
M src/mainboard/google/purin/reset.c
M src/mainboard/google/smaug/pmic.c
M src/mainboard/google/smaug/reset.c
M src/mainboard/google/storm/Kconfig
M src/mainboard/google/storm/reset.c
M src/mainboard/google/veyron/Kconfig
M src/mainboard/google/veyron/reset.c
M src/mainboard/google/veyron_mickey/Kconfig
M src/mainboard/google/veyron_mickey/reset.c
M src/mainboard/google/veyron_rialto/Kconfig
M src/mainboard/google/veyron_rialto/reset.c
M src/soc/nvidia/tegra124/Kconfig
M src/soc/nvidia/tegra210/Kconfig
27 files changed, 19 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/29048/1

diff --git a/src/mainboard/google/foster/pmic.c b/src/mainboard/google/foster/pmic.c
index b73983b..8d4f855 100644
--- a/src/mainboard/google/foster/pmic.c
+++ b/src/mainboard/google/foster/pmic.c
@@ -44,7 +44,7 @@
    	printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
    		__func__, reg, val);
    	/* Reset the board on any PMIC write error */
-		hard_reset();
+		board_reset();
    } else {
    	if (delay)
    		udelay(500);
diff --git a/src/mainboard/google/foster/reset.c b/src/mainboard/google/foster/reset.c
index 1b9e9e9..b30e1ac 100644
--- a/src/mainboard/google/foster/reset.c
+++ b/src/mainboard/google/foster/reset.c
@@ -18,7 +18,7 @@
 #include <gpio.h>
 #include <reset.h>
-void do_hard_reset(void)
+void do_board_reset(void)
 {
    gpio_output(GPIO(I5), 0);
 }
diff --git a/src/mainboard/google/gale/Kconfig b/src/mainboard/google/gale/Kconfig
index 883c9fe..f8def87 100644
--- a/src/mainboard/google/gale/Kconfig
+++ b/src/mainboard/google/gale/Kconfig
@@ -21,7 +21,6 @@
    select BOARD_ROMSIZE_KB_8192
    select COMMON_CBFS_SPI_WRAPPER
    select DRIVERS_I2C_WW_RING
-	select HAVE_HARD_RESET
    select MAINBOARD_HAS_CHROMEOS
    select SPI_FLASH
    select SPI_FLASH_GIGADEVICE
diff --git a/src/mainboard/google/gale/reset.c b/src/mainboard/google/gale/reset.c
index 23d83bf..d12fee0 100644
--- a/src/mainboard/google/gale/reset.c
+++ b/src/mainboard/google/gale/reset.c
@@ -19,7 +19,7 @@
 #include <soc/iomap.h>
 #include <reset.h>
-void do_hard_reset(void)
+void do_board_reset(void)
 {
    /*
     * At boot time the boot loaders would have set a magic cookie
diff --git a/src/mainboard/google/nyan/pmic.c b/src/mainboard/google/nyan/pmic.c
index f115586..d226459 100644
--- a/src/mainboard/google/nyan/pmic.c
+++ b/src/mainboard/google/nyan/pmic.c
@@ -61,7 +61,7 @@
    	printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
    		__func__, reg, val);
    	/* Reset the SoC on any PMIC write error */
-		hard_reset();
+		board_reset();
    } else {
    	if (do_delay)
    		udelay(500);
diff --git a/src/mainboard/google/nyan/reset.c b/src/mainboard/google/nyan/reset.c
index ee36292..468b0c2 100644
--- a/src/mainboard/google/nyan/reset.c
+++ b/src/mainboard/google/nyan/reset.c
@@ -13,11 +13,10 @@
  * GNU General Public License for more details.
  */
-#include <arch/io.h>
 #include <gpio.h>
 #include <reset.h>
-void do_hard_reset(void)
+void do_board_reset(void)
 {
         gpio_output(GPIO(I5), 0);
 }
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index 4ec0164..b96917e 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -76,7 +76,7 @@
     */
    if (power_reset_status() == POWER_RESET_WATCHDOG) {
    	printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n");
-		hard_reset();
+		board_reset();
    }
/* FIXME: this may require coordination with moving timestamps */
diff --git a/src/mainboard/google/nyan_big/pmic.c b/src/mainboard/google/nyan_big/pmic.c
index 77b6545..948d867 100644
--- a/src/mainboard/google/nyan_big/pmic.c
+++ b/src/mainboard/google/nyan_big/pmic.c
@@ -61,7 +61,7 @@
    	printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
    		__func__, reg, val);
    	/* Reset the SoC on any PMIC write error */
-		hard_reset();
+		board_reset();
    } else {
    	if (do_delay)
    		udelay(500);
diff --git a/src/mainboard/google/nyan_big/reset.c b/src/mainboard/google/nyan_big/reset.c
index ee36292..468b0c2 100644
--- a/src/mainboard/google/nyan_big/reset.c
+++ b/src/mainboard/google/nyan_big/reset.c
@@ -13,11 +13,10 @@
  * GNU General Public License for more details.
  */
-#include <arch/io.h>
 #include <gpio.h>
 #include <reset.h>
-void do_hard_reset(void)
+void do_board_reset(void)
 {
         gpio_output(GPIO(I5), 0);
 }
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index 4ec0164..b96917e 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -76,7 +76,7 @@
     */
    if (power_reset_status() == POWER_RESET_WATCHDOG) {
    	printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n");
-		hard_reset();
+		board_reset();
    }
/* FIXME: this may require coordination with moving timestamps */
diff --git a/src/mainboard/google/nyan_blaze/pmic.c b/src/mainboard/google/nyan_blaze/pmic.c
index 77b6545..948d867 100644
--- a/src/mainboard/google/nyan_blaze/pmic.c
+++ b/src/mainboard/google/nyan_blaze/pmic.c
@@ -61,7 +61,7 @@
    	printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
    		__func__, reg, val);
    	/* Reset the SoC on any PMIC write error */
-		hard_reset();
+		board_reset();
    } else {
    	if (do_delay)
    		udelay(500);
diff --git a/src/mainboard/google/nyan_blaze/reset.c b/src/mainboard/google/nyan_blaze/reset.c
index ee36292..468b0c2 100644
--- a/src/mainboard/google/nyan_blaze/reset.c
+++ b/src/mainboard/google/nyan_blaze/reset.c
@@ -13,11 +13,10 @@
  * GNU General Public License for more details.
  */
-#include <arch/io.h>
 #include <gpio.h>
 #include <reset.h>
-void do_hard_reset(void)
+void do_board_reset(void)
 {
         gpio_output(GPIO(I5), 0);
 }
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index f094e34..cc8f90e 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -80,7 +80,7 @@
     */
    if (power_reset_status() == POWER_RESET_WATCHDOG) {
    	printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n");
-		hard_reset();
+		board_reset();
    }
/* FIXME: this may require coordination with moving timestamps */
diff --git a/src/mainboard/google/purin/Kconfig b/src/mainboard/google/purin/Kconfig
index f48c33c..4666453 100644
--- a/src/mainboard/google/purin/Kconfig
+++ b/src/mainboard/google/purin/Kconfig
@@ -19,7 +19,6 @@
    def_bool y
    select BOARD_ROMSIZE_KB_2048
    select COMMON_CBFS_SPI_WRAPPER
-	select HAVE_HARD_RESET
    select MAINBOARD_HAS_CHROMEOS
    select SOC_BROADCOM_CYGNUS
    select SPI_FLASH
diff --git a/src/mainboard/google/purin/reset.c b/src/mainboard/google/purin/reset.c
index 3667bbf..51a2187 100644
--- a/src/mainboard/google/purin/reset.c
+++ b/src/mainboard/google/purin/reset.c
@@ -15,6 +15,6 @@
#include <reset.h>
-void do_hard_reset(void)
+void do_board_reset(void)
 {
 }
diff --git a/src/mainboard/google/smaug/pmic.c b/src/mainboard/google/smaug/pmic.c
index 77de277..75075ad 100644
--- a/src/mainboard/google/smaug/pmic.c
+++ b/src/mainboard/google/smaug/pmic.c
@@ -47,7 +47,7 @@
    	printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
    		__func__, reg, val);
    	/* Reset the board on any PMIC write error */
-		hard_reset();
+		board_reset();
    } else {
    	if (delay)
    		udelay(500);
diff --git a/src/mainboard/google/smaug/reset.c b/src/mainboard/google/smaug/reset.c
index fc9a0b6..121cf64 100644
--- a/src/mainboard/google/smaug/reset.c
+++ b/src/mainboard/google/smaug/reset.c
@@ -18,7 +18,7 @@
#include "gpio.h"
-void do_hard_reset(void)
+void do_board_reset(void)
 {
    gpio_output(AP_SYS_RESET_L, 0);
 }
diff --git a/src/mainboard/google/storm/Kconfig b/src/mainboard/google/storm/Kconfig
index b8fc326..e624074 100644
--- a/src/mainboard/google/storm/Kconfig
+++ b/src/mainboard/google/storm/Kconfig
@@ -21,7 +21,6 @@
    select BOARD_ROMSIZE_KB_8192
    select COMMON_CBFS_SPI_WRAPPER
    select DRIVERS_I2C_WW_RING
-	select HAVE_HARD_RESET
    select MAINBOARD_HAS_CHROMEOS
    select SPI_FLASH
    select SPI_FLASH_SPANSION
diff --git a/src/mainboard/google/storm/reset.c b/src/mainboard/google/storm/reset.c
index d8f25274..f598de9 100644
--- a/src/mainboard/google/storm/reset.c
+++ b/src/mainboard/google/storm/reset.c
@@ -39,7 +39,7 @@
    write32(APCS_WDT0_CPU0_WDOG_EXPIRED_ENABLE, 1);
 }
-void do_hard_reset(void)
+void do_board_reset(void)
 {
    wdog_reset();
 }
diff --git a/src/mainboard/google/veyron/Kconfig b/src/mainboard/google/veyron/Kconfig
index 6aef4ce..d57c143 100644
--- a/src/mainboard/google/veyron/Kconfig
+++ b/src/mainboard/google/veyron/Kconfig
@@ -36,7 +36,6 @@
    select SOC_ROCKCHIP_RK3288
    select MAINBOARD_HAS_CHROMEOS
    select BOARD_ROMSIZE_KB_4096
-	select HAVE_HARD_RESET
    select SPI_FLASH
    select SPI_FLASH_GIGADEVICE
    select SPI_FLASH_WINBOND
diff --git a/src/mainboard/google/veyron/reset.c b/src/mainboard/google/veyron/reset.c
index a937aff..512ea77 100644
--- a/src/mainboard/google/veyron/reset.c
+++ b/src/mainboard/google/veyron/reset.c
@@ -13,13 +13,12 @@
  * GNU General Public License for more details.
  */
-#include <arch/io.h>
 #include <gpio.h>
 #include <reset.h>
#include "board.h"
-void do_hard_reset(void)
+void do_board_reset(void)
 {
    gpio_output(GPIO_RESET, 1);
 }
diff --git a/src/mainboard/google/veyron_mickey/Kconfig b/src/mainboard/google/veyron_mickey/Kconfig
index c283f0e..2d51962 100644
--- a/src/mainboard/google/veyron_mickey/Kconfig
+++ b/src/mainboard/google/veyron_mickey/Kconfig
@@ -19,7 +19,6 @@
    def_bool y
    select BOARD_ROMSIZE_KB_4096
    select COMMON_CBFS_SPI_WRAPPER
-	select HAVE_HARD_RESET
    select MAINBOARD_HAS_CHROMEOS
    select SOC_ROCKCHIP_RK3288
    select SPI_FLASH
diff --git a/src/mainboard/google/veyron_mickey/reset.c b/src/mainboard/google/veyron_mickey/reset.c
index a937aff..512ea77 100644
--- a/src/mainboard/google/veyron_mickey/reset.c
+++ b/src/mainboard/google/veyron_mickey/reset.c
@@ -13,13 +13,12 @@
  * GNU General Public License for more details.
  */
-#include <arch/io.h>
 #include <gpio.h>
 #include <reset.h>
#include "board.h"
-void do_hard_reset(void)
+void do_board_reset(void)
 {
    gpio_output(GPIO_RESET, 1);
 }
diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig
index a8971d8..520d8c0 100644
--- a/src/mainboard/google/veyron_rialto/Kconfig
+++ b/src/mainboard/google/veyron_rialto/Kconfig
@@ -19,7 +19,6 @@
    def_bool y
    select BOARD_ROMSIZE_KB_4096
    select COMMON_CBFS_SPI_WRAPPER
-	select HAVE_HARD_RESET
    select MAINBOARD_HAS_CHROMEOS
    select SOC_ROCKCHIP_RK3288
    select SPI_FLASH
diff --git a/src/mainboard/google/veyron_rialto/reset.c b/src/mainboard/google/veyron_rialto/reset.c
index a937aff..512ea77 100644
--- a/src/mainboard/google/veyron_rialto/reset.c
+++ b/src/mainboard/google/veyron_rialto/reset.c
@@ -13,13 +13,12 @@
  * GNU General Public License for more details.
  */
-#include <arch/io.h>
 #include <gpio.h>
 #include <reset.h>
#include "board.h"
-void do_hard_reset(void)
+void do_board_reset(void)
 {
    gpio_output(GPIO_RESET, 1);
 }
diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig
index 79638d9..0e83774 100644
--- a/src/soc/nvidia/tegra124/Kconfig
+++ b/src/soc/nvidia/tegra124/Kconfig
@@ -7,7 +7,6 @@
    select ARCH_ROMSTAGE_ARMV7
    select ARCH_RAMSTAGE_ARMV7
    select HAVE_UART_SPECIAL
-	select HAVE_HARD_RESET
    select HAVE_MONOTONIC_TIMER
    select GENERIC_UDELAY
    select BOOTBLOCK_CONSOLE
diff --git a/src/soc/nvidia/tegra210/Kconfig b/src/soc/nvidia/tegra210/Kconfig
index c7c1cf0..44e4719 100644
--- a/src/soc/nvidia/tegra210/Kconfig
+++ b/src/soc/nvidia/tegra210/Kconfig
@@ -10,7 +10,6 @@
    select GIC
    select HAVE_MONOTONIC_TIMER
    select GENERIC_UDELAY
-	select HAVE_HARD_RESET
    select HAVE_UART_SPECIAL
    select ARM64_USE_ARM_TRUSTED_FIRMWARE
    select GENERIC_GPIO_LIB
-- 
To view, visit https://review.coreboot.org/29048
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6182da172ae2f4107a9b5d8190e4b3b10ed2f0b9
Gerrit-Change-Number: 29048
Gerrit-PatchSet: 1
Gerrit-Owner: Nico Huber nico.h@gmx.de



    

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[coreboot-gerrit] Change in coreboot[master]: reset: Convert individual boards to `board_reset()`