[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8192: Get DDR base information after calibration

[Xi Chen (Code Review)]

Attention is currently required from: Paul Menzel, CK HU, Yu-Ping Wu.
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44712 )

Change subject: soc/mediatek/mt8192: Get DDR base information after calibration
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Patch Set 47:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/44712/comment/213b877a_878834ef 
PS46, Line 8:
> Please paste the new log messages.

Done

File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:

https://review.coreboot.org/c/coreboot/+/44712/comment/6fd1be26_d8c75a99 
PS46, Line 3846: SPCMDRESP_MRR_RESPONSE
> Align with &ch[chn]

Ack

https://review.coreboot.org/c/coreboot/+/44712/comment/fe11e1b1_211676e1 
PS46, Line 3867: 	return value;
> Please add a blank line above.

Ack

File src/soc/mediatek/mt8192/dramc_pi_main.c:

https://review.coreboot.org/c/coreboot/+/44712/comment/a246caa7_47477623 
PS46, Line 57: 0x%#x
> %#x

Ack