[coreboot-gerrit] [XS] Change in coreboot[main]: intel/common/rtd3: Allow emitting PSD0 Method for PCH Root Ports

[Sean Rhodes (Code Review)]

Attention is currently required from: Cliff Huang, Jérémy Compostella, Matt DeVillier, Subrata Banik.

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85696?usp=email )

Change subject: intel/common/rtd3: Allow emitting PSD0 Method for PCH Root Ports
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Patch Set 7:

(1 comment)

File src/soc/intel/common/block/pcie/rtd3/rtd3.c:

https://review.coreboot.org/c/coreboot/+/85696/comment/591ca232_c18fad0e?usp... :
PS5, Line 437: 	if (rp_type != PCIE_RP_PCH) {
> > Modphy gatting is supported only for PCIe root port under PCH in rtd3.c. […]

Interesting - thanks!