Attention is currently required from: Dinesh Gehlot, Kapil Porwal.
Karthik Ramasubramanian has posted comments on this change by Dinesh Gehlot. ( https://review.coreboot.org/c/coreboot/+/85219?usp=email )
Change subject: src/soc/intel/cmn/blk/cse: Log cse sync information
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/85219/comment/08fb4882_f21353af?usp... :
PS1, Line 838: if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE))
: elog_add_event_byte(ELOG_TYPE_FW_CSE_SYNC, ELOG_FW_RAMSTAGE_CSE_SYNC);
: else
: elog_add_event_byte(ELOG_TYPE_FW_CSE_SYNC, ELOG_FW_ROMSTAGE_CSE_SYNC);
`elog_add_event_byte(ELOG_TYPE_FW_CSE_SYNC, ENV_RAMSTAGE ? ...);`
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