[coreboot-gerrit] [XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock

[Saurabh Mishra (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun.

Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83354?usp=email )

Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
......................................................................

Patch Set 12:

(3 comments)

File src/soc/intel/meteorlake/bootblock/soc_die.c:

https://review.coreboot.org/c/coreboot/+/83354/comment/99da43f2_99b6b124?usp... :
PS11, Line 85:  * Enabling PCD DIE PMC PWRM Base for accessing
> why did you ended up modifying MTL SoC code ?

Oh, my bad. File came from my cache. Removed.

File src/soc/intel/pantherlake/bootblock/report_platform.c:

https://review.coreboot.org/c/coreboot/+/83354/comment/f1d560d3_1453d924?usp... :
PS11, Line 32: 12Xe
> u don't need to specify all those details, just H is enough IMO.

Acknowledged

https://review.coreboot.org/c/coreboot/+/83354/comment/1933955e_bd623c7f?usp... :
PS11, Line 47: 	{ PCI_DID_INTEL_PTL_H_ESPI_7, "Pantherlake SOC" },
> please list entire list for PTL-UH/H as well

Acknowledged