Ben Gardner (gardner.ben@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12488
-gerrit
commit 5f0c0e10a8dbe41dc3739e18b5c2f6ba215df168 Author: Ben Gardner gardner.ben@gmail.com Date: Thu Nov 19 16:12:21 2015 -0600
baytrail: add C0 and D0 stepping decode
The E3800 with ordering code FH8065301487717 is stepping D0, value 0x11. Add that so the debug log shows 'D0' instead of '??'.
Also, add the C0 stepping decode to fsp_baytrail.
Change-Id: Ibec764fcf5d3f448e38831786a071f5ab6066d67 Signed-off-by: Ben Gardner gardner.ben@gmail.com --- src/soc/intel/baytrail/include/soc/lpc.h | 3 +++ src/soc/intel/baytrail/ramstage.c | 7 +++++-- src/soc/intel/fsp_baytrail/baytrail/lpc.h | 3 +++ src/soc/intel/fsp_baytrail/ramstage.c | 10 ++++++++-- 4 files changed, 19 insertions(+), 4 deletions(-)
diff --git a/src/soc/intel/baytrail/include/soc/lpc.h b/src/soc/intel/baytrail/include/soc/lpc.h index 97de16f..b3fa6de 100644 --- a/src/soc/intel/baytrail/include/soc/lpc.h +++ b/src/soc/intel/baytrail/include/soc/lpc.h @@ -33,6 +33,8 @@ #define RID_A_STEPPING_START 1 #define RID_B_STEPPING_START 5 #define RID_C_STEPPING_START 0xe +#define RID_D_STEPPING_START 0x11 + enum baytrail_stepping { STEP_A0, STEP_A1, @@ -41,6 +43,7 @@ enum baytrail_stepping { STEP_B2, STEP_B3, STEP_C0, + STEP_D0, };
/* Registers behind the RCBA_BASE_ADDRESS bar. */ diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c index 4a839db..c0cdd23 100644 --- a/src/soc/intel/baytrail/ramstage.c +++ b/src/soc/intel/baytrail/ramstage.c @@ -70,7 +70,7 @@ static inline void fill_in_msr(msr_t *msr, int idx) }
static const char *stepping_str[] = { - "A0", "A1", "B0", "B1", "B2", "B3", "C0" + "A0", "A1", "B0", "B1", "B2", "B3", "C0", "D0", };
static void fill_in_pattrs(void) @@ -83,7 +83,10 @@ static void fill_in_pattrs(void) dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); attrs->revid = pci_read_config8(dev, REVID); /* The revision to stepping IDs have two values per metal stepping. */ - if (attrs->revid >= RID_C_STEPPING_START) { + if (attrs->revid >= RID_D_STEPPING_START) { + attrs->stepping = (attrs->revid - RID_D_STEPPING_START) / 2; + attrs->stepping += STEP_D0; + } else if (attrs->revid >= RID_C_STEPPING_START) { attrs->stepping = (attrs->revid - RID_C_STEPPING_START) / 2; attrs->stepping += STEP_C0; } else if (attrs->revid >= RID_B_STEPPING_START) { diff --git a/src/soc/intel/fsp_baytrail/baytrail/lpc.h b/src/soc/intel/fsp_baytrail/baytrail/lpc.h index bf0206f..832fb31 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/lpc.h +++ b/src/soc/intel/fsp_baytrail/baytrail/lpc.h @@ -86,6 +86,8 @@ #define RID_A_STEPPING_START 1 #define RID_B_STEPPING_START 5 #define RID_C_STEPPING_START 0xe +#define RID_D_STEPPING_START 0x11 + enum baytrail_stepping { STEP_A0, STEP_A1, @@ -94,6 +96,7 @@ enum baytrail_stepping { STEP_B2, STEP_B3, STEP_C0, + STEP_D0, };
/* Registers behind the RCBA_BASE_ADDRESS bar. */ diff --git a/src/soc/intel/fsp_baytrail/ramstage.c b/src/soc/intel/fsp_baytrail/ramstage.c index ff2b0a6..abd4451 100644 --- a/src/soc/intel/fsp_baytrail/ramstage.c +++ b/src/soc/intel/fsp_baytrail/ramstage.c @@ -68,7 +68,7 @@ static inline void fill_in_msr(msr_t *msr, int idx) }
static const char *stepping_str[] = { - "A0", "A1", "B0", "B1", "B2", "B3" + "A0", "A1", "B0", "B1", "B2", "B3", "C0", "D0", };
static void fill_in_pattrs(void) @@ -81,7 +81,13 @@ static void fill_in_pattrs(void) dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); attrs->revid = pci_read_config8(dev, REVID); /* The revision to stepping IDs have two values per metal stepping. */ - if (attrs->revid >= RID_B_STEPPING_START) { + if (attrs->revid >= RID_D_STEPPING_START) { + attrs->stepping = (attrs->revid - RID_D_STEPPING_START) / 2; + attrs->stepping += STEP_D0; + } else if (attrs->revid >= RID_C_STEPPING_START) { + attrs->stepping = (attrs->revid - RID_C_STEPPING_START) / 2; + attrs->stepping += STEP_C0; + } else if (attrs->revid >= RID_B_STEPPING_START) { attrs->stepping = (attrs->revid - RID_B_STEPPING_START) / 2; attrs->stepping += STEP_B0; } else {