Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33549 )
Change subject: sb/intel/bd82x6x/lpc: Setup default LPC decode ranges ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/33549/4/src/mainboard/intel/dcp847s... File src/mainboard/intel/dcp847ske/early_southbridge.c:
https://review.coreboot.org/c/coreboot/+/33549/4/src/mainboard/intel/dcp847s... PS4, Line 41: pci_write_config32(PCI_DEV(0, 0x1f, 0), LPC_GEN1_DEC, 0x00fc0a01);
this line shouldn't be dropped […]
ok
https://review.coreboot.org/c/coreboot/+/33549/4/src/mainboard/intel/emerald... File src/mainboard/intel/emeraldlake2/romstage.c:
https://review.coreboot.org/c/coreboot/+/33549/4/src/mainboard/intel/emerald... PS4, Line 33: pci_devfn_t dev = PCH_LPC_DEV; : : /* Enable SuperIO + PS/2 Keyboard/Mouse */ : u16 lpc_config = CNF1_LPC_EN | CNF2_LPC_EN | KBC_LPC_EN; : pci_write_config16(dev, LPC_EN, lpc_config); : : /* Enable COM1 */ : if (sio1007_enable_uart_at(SIO_PORT)) { : pci_write_config16(dev, LPC_EN, : lpc_config | COMA_LPC_EN);
this can be dropped […]
hm, might be. keep this for now then