[coreboot-gerrit] [M] Change in coreboot[main]: mb/google/fatcat/var/fatcat: Enable FPS

[Cliff Huang (Code Review)]

Attention is currently required from: Subrata Banik.

Cliff Huang has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85687?usp=email )

Change subject: mb/google/fatcat/var/fatcat: Enable FPS
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Patch Set 6:

(1 comment)

File src/mainboard/google/fatcat/variants/fatcat/overridetree.cb:

https://review.coreboot.org/c/coreboot/+/85687/comment/8c2e0412_2625aa3e?usp... :
PS6, Line 110: 	register "serial_io_gspi_mode" = "{
Can we consider adding this to SOC based on if the corresponding PCIe device is set to enable?

I recall we have this in PTL internally, but for some reason not ported to upstream:
...
static const pci_devfn_t gspi_dev[] = {
    PCI_DEVFN_GSPI0,
    PCI_DEVFN_GSPI1,
    PCI_DEVFN_GSPI2,
};
...

static void fill_fsps_lpss_params(FSP_S_CONFIG *s_cfg, const config_t *config)
{
.....
    max_port = get_max_gspi_port();
    for (i = 0; i < max_port; i++) {
        s_cfg->SerialIoLpssSpiCsMode[i] = config->SerialIoGSpiCsMode[i];
        s_cfg->SerialIoLpssSpiCsState[i] = config->SerialIoGSpiCsState[i];
        s_cfg->SerialIoLpssSpiMode[i] =
            is_devfn_enabled(gspi_dev[i]) ? config->SerialIoGSpiMode[i] : 0;
    }
....
}