[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Allow Audio DSP OSC qualification for low power...

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37604 )

Change subject: soc/intel/cannonlake: Allow Audio DSP OSC qualification for low power idle
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soc/intel/cannonlake: Allow Audio DSP OSC qualification for low power idle

With Audio DSP OSC qualification disabled from S0ix criteria.
S0ix is achieved before the DSP is suspended. When driver tries
to suspend DSP its already turned off.

BUG=b:139481313

Change-Id: I20b793b95483af03ce4ae068ac07864a9e90d39b
Signed-off-by: Aamir Bohra 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37604
Reviewed-by: Tim Wawrzynczak 
Reviewed-by: Furquan Shaikh 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/finalize.c
M src/soc/intel/cannonlake/include/soc/pmc.h
3 files changed, 16 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 0712146..fd37d26 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -59,8 +59,13 @@
    uint32_t gen3_dec;
    uint32_t gen4_dec;

+	/* S0ix configuration */
+
    /* Enable S0iX support */
    int s0ix_enable;
+	/* Enable Audio DSP oscillator qualification for S0ix */
+	uint8_t cppmvric2_adsposcdis;
+
    /* Enable DPTF support */
    int dptf_enable;

diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c
index 002e8ea..b2fb9f9 100644
--- a/src/soc/intel/cannonlake/finalize.c
+++ b/src/soc/intel/cannonlake/finalize.c
@@ -91,11 +91,18 @@
    	write8(pmcbase + PCH_PWRM_ACPI_TMR_CTL, reg8);
    }

-	/* Disable XTAL shutdown qualification for low power idle. */
    if (config->s0ix_enable) {
+		/* Disable XTAL shutdown qualification for low power idle. */
    	reg32 = read32(pmcbase + CPPMVRIC);
    	reg32 |= XTALSDQDIS;
    	write32(pmcbase + CPPMVRIC, reg32);
+
+		if (config->cppmvric2_adsposcdis) {
+			/* Enable Audio DSP OSC qualification for S0ix */
+			reg32 = read32(pmcbase + CPPMVRIC2);
+			reg32 &= ~ADSPOSCDIS;
+			write32(pmcbase + CPPMVRIC2, reg32);
+		}
    }

pch_handle_sideband(config);
diff --git a/src/soc/intel/cannonlake/include/soc/pmc.h b/src/soc/intel/cannonlake/include/soc/pmc.h
index 252c719..fbd366b 100644
--- a/src/soc/intel/cannonlake/include/soc/pmc.h
+++ b/src/soc/intel/cannonlake/include/soc/pmc.h
@@ -156,6 +156,9 @@
 #define CPPMVRIC			0x1B1C
 #define   XTALSDQDIS			(1 << 22)

+#define CPPMVRIC2			0x1B4C
+#define   ADSPOSCDIS			(1 << 22)
+
 #define IRQ_REG				ACTL
 #define SCI_IRQ_ADJUST			0
 #define ACTL				0x1BD8