Attention is currently required from: Jason Glenesk, Raul Rangel, Furquan Shaikh, Martin Roth, Marshall Dawson, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51924 )
Change subject: soc/amd/common: Handle power resume after power failure ......................................................................
Patch Set 2:
(4 comments)
File src/soc/amd/common/block/pm/Kconfig:
https://review.coreboot.org/c/coreboot/+/51924/comment/11ecbdda_37d43505 PS1, Line 3: depends on
depends on or select? i'd use select here
Marked it as "depends on" since it depends on pm_io_read8/pm_io_write8 implementation in SOC_AMD_COMMON_BLOCK_ACPIMMIO. I am seeing that the SOC_AMD_COMMON_BLOCK_ACPIMMIO is already selected in SoC. So it may end up as a redundant selection if we do it here.
File src/soc/amd/common/block/pm/pmlib.c:
https://review.coreboot.org/c/coreboot/+/51924/comment/7097999b_630e63b7 PS1, Line 5: #define PWR_FAIL_OFF 0x0 /* Always power off after power resumes */ : #define PWR_FAIL_ON 0x1 /* Always power on after power resumes */ : #define PWR_FAIL_PREV 0x3 /* Use previous setting after power resumes */
Thanks for the inputs. I agree that this change is not fully ready. […]
Done
https://review.coreboot.org/c/coreboot/+/51924/comment/32ed1fae_3263e39a PS1, Line 36: val |= pwr_fail;
the ppr says that bit 2 should always be written to 1
Done
https://review.coreboot.org/c/coreboot/+/51924/comment/8b3bdc7d_3427fcdc PS1, Line 40:
Looks like Jenkins failed due to the extra blank line.
Done