Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33200
Change subject: sb/intel/common: Make linking pmbase.c conditional ......................................................................
sb/intel/common: Make linking pmbase.c conditional
Change-Id: I6a7cd96699dbeb42a53bf1d25db1bcf93e416e0f Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Kconfig M src/southbridge/intel/common/Makefile.inc 2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/33200/1
diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig index c3bd90d..42717b0 100644 --- a/src/southbridge/intel/common/Kconfig +++ b/src/southbridge/intel/common/Kconfig @@ -10,6 +10,10 @@ def_bool n depends on SOUTHBRIDGE_INTEL_COMMON
+config SOUTHBRIDGE_INTEL_COMMON_PMBASE + def_bool n + depends on SOUTHBRIDGE_INTEL_COMMON + config SOUTHBRIDGE_INTEL_COMMON_GPIO def_bool n
@@ -35,6 +39,7 @@ def_bool n select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE + select SOUTHBRIDGE_INTEL_PMBASE
config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT bool diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index dbc9c93..ac2fd8e 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -38,8 +38,10 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y)
-$(eval $(call add_to_all_stages,y,pmbase.c)) +$(eval $(call add_to_all_stages,$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE),pmbase.c)) +ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE),y) smm-y += pmbase.c +endif
bootblock-$(CONFIG_USBDEBUG) += usb_debug.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c