[coreboot-gerrit] Change in coreboot[master]: update spm.c

[Roger Lu (Code Review)]

Hello Roger Lu,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/48450

to review the following change.

Change subject: update spm.c
......................................................................

update spm.c

1. Replace 0x40000000 with SPM_SYSTEM_BASE_OFFSET
2. Change print level
- old: printk(BIOS_INFO, "%s: ptr = %#lx, pmem/dmem words = %#x/%#x\n",
- new: printk(BIOS_DEBUG, "%s: ptr = %#lx, pmem/dmem words = %#x/%#x\n",
3. Always kick IM to refetch our trusted data.

Change-Id: I185200655f7c9d18a4fc1dd95b6a2a6e4e6966c1
---
M src/soc/mediatek/mt8192/spm.c
1 file changed, 10 insertions(+), 20 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/48450/1

diff --git a/src/soc/mediatek/mt8192/spm.c b/src/soc/mediatek/mt8192/spm.c
index 1c552bd..0eb46ac 100644
--- a/src/soc/mediatek/mt8192/spm.c
+++ b/src/soc/mediatek/mt8192/spm.c
@@ -10,6 +10,7 @@
 #include <soc/symbols.h>
 #include <timer.h>

+#define SPM_SYSTEM_BASE_OFFSET	0x40000000
 #define SPMFW_HEADER_SIZE	16

static const struct pwr_ctrl spm_init_ctrl = {
@@ -433,14 +434,14 @@
    u32 pmem_start;
    u32 dmem_start;

-	ptr = (uintptr_t)pcm->buf + 0x40000000;
+	ptr = (uintptr_t)pcm->buf + SPM_SYSTEM_BASE_OFFSET;
    pmem_words = pcm->desc.pmem_words;
    total_words = pcm->desc.total_words;
    dmem_words = total_words - pmem_words;
    pmem_start = pcm->desc.pmem_start;
    dmem_start = pcm->desc.dmem_start;

-	printk(BIOS_INFO, "%s: ptr = %#lx, pmem/dmem words = %#x/%#x\n",
+	printk(BIOS_DEBUG, "%s: ptr = %#lx, pmem/dmem words = %#x/%#x\n",
           __func__, (long)ptr, pmem_words, dmem_words);

/* DMA needs 16-byte aligned source data. */
@@ -449,24 +450,13 @@
    assert(pmem_words % 4 == 0);
    assert(dmem_words % 4 == 0);

-	/* Tell IM where is PCM code (use slave mode if code existed) */
-	if (read32(&mtk_spm->md32pcm_dma0_src) != ptr ||
-	    read32(&mtk_spm->md32pcm_dma0_dst) != pmem_start ||
-	    read32(&mtk_spm->md32pcm_dma0_wppt) != pmem_words ||
-	    read32(&mtk_spm->md32pcm_dma0_wpto) != dmem_start ||
-	    read32(&mtk_spm->md32pcm_dma0_count) != total_words ||
-	    read32(&mtk_spm->md32pcm_dma0_con) != MD32PCM_DMA0_CON_VAL) {
-		write32(&mtk_spm->md32pcm_dma0_src, ptr);
-		write32(&mtk_spm->md32pcm_dma0_dst, pmem_start);
-		write32(&mtk_spm->md32pcm_dma0_wppt, pmem_words);
-		write32(&mtk_spm->md32pcm_dma0_wpto, dmem_start);
-		write32(&mtk_spm->md32pcm_dma0_count, total_words);
-		write32(&mtk_spm->md32pcm_dma0_con, MD32PCM_DMA0_CON_VAL);
-		write32(&mtk_spm->md32pcm_dma0_start, MD32PCM_DMA0_START_VAL);
-	} else {
-		setbits32(&mtk_spm->pcm_con1,
-			  SPM_REGWR_CFG_KEY | RG_IM_SLAVE_LSB);
-	}
+	write32(&mtk_spm->md32pcm_dma0_src, ptr);
+	write32(&mtk_spm->md32pcm_dma0_dst, pmem_start);
+	write32(&mtk_spm->md32pcm_dma0_wppt, pmem_words);
+	write32(&mtk_spm->md32pcm_dma0_wpto, dmem_start);
+	write32(&mtk_spm->md32pcm_dma0_count, total_words);
+	write32(&mtk_spm->md32pcm_dma0_con, MD32PCM_DMA0_CON_VAL);
+	write32(&mtk_spm->md32pcm_dma0_start, MD32PCM_DMA0_START_VAL);

setbits32(&mtk_spm->pcm_con0, SPM_REGWR_CFG_KEY | PCM_CK_EN_LSB);
 }