Michael Tasche (michael.tasche@esd.eu) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12579
-gerrit
commit f631a4ed64f250cb37ebed7e23e30c73a00faf7c Author: Michael Tasche michael.tasche@esd.eu Date: Tue Dec 1 13:54:23 2015 +0100
pci_device: IRQ swizzling for pci2pci bridges corrected
On ATOM E38xx we have 4 PCIe lanes seen as one multifunction device with function 0-3. The swizzling was correct for lane 0(function 0) only.
Change-Id: I669b7f5244a7f8cc23df5e9020f26510e778c64d Signed-off-by: Michael Tasche michael.tasche@esd.eu --- src/device/pci_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 5123229..04a1050 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1340,7 +1340,7 @@ static int swizzle_irq_pins(device_t dev, device_t *parent_bridge) child_devfn = child->path.pci.devfn;
/* Swizzle the INT_PIN for any bridges not on root bus */ - swizzled_pin = (PCI_SLOT(child_devfn) + swizzled_pin) % 4; + swizzled_pin = (PCI_SLOT(child_devfn) + PCI_FUNC(parent_devfn) + swizzled_pin) % 4; printk(BIOS_SPEW, "\tWith INT_PIN swizzled to %s\n" "\tAttached to bridge device %01X:%02Xh.%02Xh\n", pin_to_str(swizzled_pin + 1), parent_bus,