[coreboot-gerrit] [XL] Change in coreboot[main]: soc/intel/xeon-sp: Hook up public FSP bin and headers

[Patrick Rudolph (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Fabian Meyer, Felix Singer, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Shuo Liu, Srinidhi N Kaushik, Tim Chu.

Patrick Rudolph has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/80360?usp=email )

Change subject: soc/intel/xeon-sp: Hook up public FSP bin and headers
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Patch Set 4:

(1 comment)

Patchset:

PS3:
> PcdMigrateTemporaryRamFirmwareVolumes is a feature for UEFI boot guard and not ready to be used with […]

It's not a feature, it's an invalid configuration for FSP in API mode.
FSP-S is loaded by the bootloader, thus FSP-S must never access the SPI flash, modify it, protect it or whatsoever. There's no TOCTOU Vulnerability, thus nothing to protect.