[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block: Add Kconfig to correct TBT indexing

[EricR Lai (Code Review)]

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak.
EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61936 )

Change subject: soc/intel/common/block: Add Kconfig to correct TBT indexing
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Patch Set 4:

(1 comment)

File src/soc/intel/common/block/pcie/pcie_rp.c:

https://review.coreboot.org/c/coreboot/+/61936/comment/549c69b4_6c045af4 
PS3, Line 49: 		port_num = port_num - 1;
> I'm somehow not happy to W/A FSP mistakes in common code. […]

Eventually I want this can solve by TBT FW or FSP. For the schedule reality, we have to accept the WA for this moment. We can remove this after it fixed, WDYT?