[coreboot-gerrit] Change in coreboot[master]: mediatek/mt8183: keep XO_SOC always in Full Power Mode

[Weiyi Lu (Code Review)]

Hello Weiyi Lu,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/35905

to review the following change.

Change subject: mediatek/mt8183: keep XO_SOC always in Full Power Mode
......................................................................

mediatek/mt8183: keep XO_SOC always in Full Power Mode

We could have XO_SOC output 26MHz to SOC by keeping it always in
Full Power Mode even when the system suspended as a workaround for
the random failure of suspend resume test.

BRANCH=none
TEST=suspend resume stress test by 2500 times passed on Krane.

Change-Id: Id6cf8a9968cbdd2a5865aa2fd158a1ba0beb90f5
Signed-off-by: Weiyi Lu 
---
M src/soc/mediatek/mt8183/rtc.c
1 file changed, 5 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/35905/1

diff --git a/src/soc/mediatek/mt8183/rtc.c b/src/soc/mediatek/mt8183/rtc.c
index 19b717c..c2d6c80 100644
--- a/src/soc/mediatek/mt8183/rtc.c
+++ b/src/soc/mediatek/mt8183/rtc.c
@@ -411,8 +411,11 @@
    rtc_write(PMIC_RG_DCXO_CW16, 0x9855);

/* 26M enable control */
-	/* Enable clock buffer XO_SOC, XO_CEL */
-	rtc_write(PMIC_RG_DCXO_CW00, 0x4805);
+	/*
+	 * Enable clock buffer XO_SOC and XO_CEL.
+	 * Also keep XO_SOC always in Full Power Mode.
+	 */
+	rtc_write(PMIC_RG_DCXO_CW00, 0x6805);
    rtc_write(PMIC_RG_DCXO_CW11, 0x8000);

/* Load thermal coefficient */