Bill XIE has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41505 )
Change subject: mb/lenovo/{x230, x230s}: Disable SuperSpeed capabilities for wwan usb ......................................................................
mb/lenovo/{x230, x230s}: Disable SuperSpeed capabilities for wwan usb
Although on ThinkPads with Panther Point PCH the usb port inside wwan socket is usually wired to XHCI, it has actually no SuperSpeed lines, so maybe it is okay to disable SuperSpeed capabilities, and wire them to EHCI #2 by making use of XUSB2PRM and USB3PRM.
This applies to both variants of x230 and t430s, and should to X1 Carbon Gen1, which I do not possess.
Change-Id: Ia8d27be84e4dbfa0efed506b9fc010e7f4d6ba23 Signed-off-by: Bill XIE persmule@hardenedlinux.org --- M src/mainboard/lenovo/x230/devicetree.cb 1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/41505/1
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index 3a8e5fe..b4247d1 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -58,8 +58,9 @@ register "gen2_dec" = "0x0c15e1" register "gen4_dec" = "0x0c06a1"
- register "xhci_switchable_ports" = "0xf" - register "superspeed_capable_ports" = "0xf" + # Wire port 4 (wwan usb) to ehci for it lacks superspeed components + register "xhci_switchable_ports" = "0x7" + register "superspeed_capable_ports" = "0x7" register "xhci_overcurrent_mapping" = "0x4000201"
# Enable zero-based linear PCIe root port functions