Attention is currently required from: Felix Held, Felix Singer, Maxim, Michał Żygowski.
Hello Felix Held, Felix Singer, Michał Żygowski, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83004?usp=email
to look at the new patch set (#3).
The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)
Change subject: util/superiotool/fintek: Add f81866 register table ......................................................................
util/superiotool/fintek: Add f81866 register table
TEST: legacy:
Found Fintek F81866 (vid=0x3419, id=0x1010) at 0x4e LDN 0xfe idx SL 02 07 20 21 23 24 25 26 27 2d 28 29 2a 2b 2c 2d SL 28 2c SL ... val SL 00 fe 10 10 19 34 5a 23 90 2e a0 f0 45 02 e3 2e SL 03 01 SL ... def 00 NA 00 10 10 19 34 00 03 00 08 60 03 NA 02 NA NA 08 NA 0f 10 ...
alternative:
Found Fintek F81866 (vid=0x3419, id=0x1010) at 0x4e LDN 0xfe idx def val ==== Bank Select (27h): GPIO_PROG_SEL[0], CLK_TUNE_PROG_EN[0] ==== 0x02: (NA) 0x00 0x07: 0x00 [0xfe] 0x20: 0x10 0x10 0x21: 0x10 0x10 0x23: 0x19 0x19 0x24: 0x34 0x34 0x25: 0x00 [0x5a] 0x26: 0x03 [0x23] 0x27: 0x00 [0x90] 0x2d: 0x08 [0x2e] 0x28: 0x60 [0xa0] 0x29: 0x03 [0xf0] 0x2a: (NA) 0x45 0x2b: 0x02 0x02 0x2c: (NA) 0xe3 0x2d: (NA) 0x2e ==== Bank Select (27h): GPIO_PROG_SEL[2], CLK_TUNE_PROG_EN[0] ==== 0x28: (NA) 0x03 0x2c: 0x0f [0x01] ==== Bank Select (27h): GPIO_PROG_SEL[0], CLK_TUNE_PROG_EN[0] ==== 0x2c: 0x00 [0xe3] ==== Bank Select (27h): GPIO_PROG_SEL[0], CLK_TUNE_PROG_EN[1] ==== 0x29: 0x03 0x03 0x2c: (NA) 0x00 0x2b: (NA) 0x00 ==== Bank Select (27h): GPIO_PROG_SEL[0], CLK_TUNE_PROG_EN[0] ====
Change-Id: I4367a1129fe628e7bf05d49678ea1c3718da710b Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M util/superiotool/fintek.c 1 file changed, 142 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/83004/3