[coreboot-gerrit] Patch set updated for coreboot: 2b44c33 superio/fintek/f71863fg: [2/5] Avoid .c includes

[Edward O'Callaghan]

Edward O'Callaghan ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5435

-gerrit

commit 2b44c339c7511fbbf9b036557adfda651a4b6f17
Author: Edward O'Callaghan 
Date:   Mon Mar 31 15:08:35 2014 +1100

superio/fintek/f71863fg: [2/5] Avoid .c includes

Following the same reasoning as commit
    d3043313a91dff3bc2f879ffb3b4bf23a364d711 superio/fintek/f81865f: Avoid
    .c includes
    Clean up the early_serial #include directives in mainboard/romstage code.

Change-Id: I863c16634873224c17e43100271e9b91419724d0
    Signed-off-by: Edward O'Callaghan 
---
 src/mainboard/jetway/pa78vm5/romstage.c    | 2 +-
 src/superio/fintek/f71863fg/Makefile.inc   | 2 +-
 src/superio/fintek/f71863fg/chip.h         | 2 +-
 src/superio/fintek/f71863fg/early_serial.c | 3 ++-
 src/superio/fintek/f71863fg/f71863fg.h     | 4 +++-
 5 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index b8fa48e..c082a67 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -42,7 +42,7 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-#include "superio/fintek/f71863fg/early_serial.c"
+#include <superio/fintek/f71863fg/f71863fg.h>
 #include <cpu/amd/mtrr.h>
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
 #include "southbridge/amd/rs780/early_setup.c"
diff --git a/src/superio/fintek/f71863fg/Makefile.inc b/src/superio/fintek/f71863fg/Makefile.inc
index 0deb77e..85ec530 100644
--- a/src/superio/fintek/f71863fg/Makefile.inc
+++ b/src/superio/fintek/f71863fg/Makefile.inc
@@ -18,5 +18,5 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 ##

+romstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += early_serial.c
 ramstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += superio.c
-
diff --git a/src/superio/fintek/f71863fg/chip.h b/src/superio/fintek/f71863fg/chip.h
index 9084824..4d2652e 100644
--- a/src/superio/fintek/f71863fg/chip.h
+++ b/src/superio/fintek/f71863fg/chip.h
@@ -29,4 +29,4 @@ struct superio_fintek_f71863fg_config {
    struct pc_keyboard keyboard;
 };

-#endif
+#endif /* SUPERIO_FINTEK_F71863FG_CHIP_H */
diff --git a/src/superio/fintek/f71863fg/early_serial.c b/src/superio/fintek/f71863fg/early_serial.c
index 5d1cfb7..251f298 100644
--- a/src/superio/fintek/f71863fg/early_serial.c
+++ b/src/superio/fintek/f71863fg/early_serial.c
@@ -21,6 +21,7 @@
 /* Pre-RAM driver for the Fintek F71863FG Super I/O chip. */

#include <arch/io.h>
+#include <device/pnp.h>
 #include "f71863fg.h"

static void pnp_enter_conf_state(device_t dev)
@@ -36,7 +37,7 @@ static void pnp_exit_conf_state(device_t dev)
    outb(0xaa, port);
 }

-static void f71863fg_enable_serial(device_t dev, u16 iobase)
+void f71863fg_enable_serial(device_t dev, u16 iobase)
 {
    pnp_enter_conf_state(dev);
    pnp_set_logical_device(dev);
diff --git a/src/superio/fintek/f71863fg/f71863fg.h b/src/superio/fintek/f71863fg/f71863fg.h
index 5f11879..127a120 100644
--- a/src/superio/fintek/f71863fg/f71863fg.h
+++ b/src/superio/fintek/f71863fg/f71863fg.h
@@ -33,4 +33,6 @@
 #define	F71863FG_SPI	0x08	/* SPI */
 #define	F71863FG_PME	0x0a	/* Power Management Events (PME) and ACPI */

-#endif
+void f71863fg_enable_serial(device_t dev, u16 iobase);
+
+#endif /* SUPERIO_FINTEK_F71863FG_F71863FG_H */