Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31160 )
Change subject: soc/amd/stoneyridge: Reboot if missing MRC cache info ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/#/c/31160/2/src/soc/amd/common/block/s3/s3_resum... File src/soc/amd/common/block/s3/s3_resume.c:
https://review.coreboot.org/#/c/31160/2/src/soc/amd/common/block/s3/s3_resum... PS2, Line 50: size
Good call. […]
That should probably happen inside AGESA itself. I think the seeming lack of any sort of check is a significant oversight.
https://review.coreboot.org/#/c/31160/3/src/soc/amd/common/block/s3/s3_resum... File src/soc/amd/common/block/s3/s3_resume.c:
https://review.coreboot.org/#/c/31160/3/src/soc/amd/common/block/s3/s3_resum... PS3, Line 50: for (i = 0 ; i < 4 ; i++) Address Paul's comment?
for (i = 0; i < 4; i++)