Václav Straka has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85825?usp=email )
Change subject: mb/hp: Add Pro 3400 ......................................................................
mb/hp: Add Pro 3400
Based on autoport and HP Pro 3500. As part of this change renamed 3500 to 3x00 and added this as it's variant. As a side effect fixed 3500's USB. (broken since 81878)
It's an almost identical board to the 3500 but has a smaller flash.
Other differences between boards were identified by autoport. They may or may not important but were included anyway.
Tested on HP Pro 3400, behaves exactly as 3500 described in the docs. Changes were not significant enough to require retesting on 3500.
Change-Id: I833996f6eddcaac91fb0ad0cd95fcc2a99447387 Signed-off-by: Vesek venda.straka@gmail.com --- D Documentation/mainboard/hp/pro_3500_series.md A Documentation/mainboard/hp/pro_3x00_series.md R Documentation/mainboard/hp/pro_3x00_series_flash.avif R Documentation/mainboard/hp/pro_3x00_series_jumper.avif M Documentation/mainboard/index.md D src/mainboard/hp/pro_3500_series/Kconfig A src/mainboard/hp/pro_3x00_series/Kconfig R src/mainboard/hp/pro_3x00_series/Kconfig.name R src/mainboard/hp/pro_3x00_series/Makefile.mk R src/mainboard/hp/pro_3x00_series/acpi/ec.asl R src/mainboard/hp/pro_3x00_series/acpi/platform.asl R src/mainboard/hp/pro_3x00_series/acpi/superio.asl R src/mainboard/hp/pro_3x00_series/acpi_tables.c A src/mainboard/hp/pro_3x00_series/board_info.txt A src/mainboard/hp/pro_3x00_series/cmos.default A src/mainboard/hp/pro_3x00_series/cmos.layout R src/mainboard/hp/pro_3x00_series/common_defines.h R src/mainboard/hp/pro_3x00_series/devicetree.cb R src/mainboard/hp/pro_3x00_series/dsdt.asl R src/mainboard/hp/pro_3x00_series/early_init.c R src/mainboard/hp/pro_3x00_series/gma-mainboard.ads R src/mainboard/hp/pro_3x00_series/hda_verb.c R src/mainboard/hp/pro_3x00_series/led.c R src/mainboard/hp/pro_3x00_series/led.h R src/mainboard/hp/pro_3x00_series/mainboard.c R src/mainboard/hp/pro_3x00_series/smihandler.c C src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/board_info.txt A src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/data.vbt A src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/gpio.c A src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/overridetree.cb R src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/board_info.txt R src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/data.vbt R src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/gpio.c A src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/overridetree.cb 34 files changed, 504 insertions(+), 165 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/85825/1
diff --git a/Documentation/mainboard/hp/pro_3500_series.md b/Documentation/mainboard/hp/pro_3500_series.md deleted file mode 100644 index 881bf37..0000000 --- a/Documentation/mainboard/hp/pro_3500_series.md +++ /dev/null @@ -1,103 +0,0 @@ -# HP Pro 3500 Series - -This page describes how to run coreboot on the [Pro 3500 Series] -desktop from [HP]. - -## State - -All peripherals should work. Automatic fan control as well as S3 are -working. The board was tested to boot Linux and Windows. EHCI debug -is untested. When using MrChromebox edk2 with secure boot build in, the -board will hang on each boot for about 20 seconds before continuing. -With disabled ME, the SuperIO will not get CPU temperatures via PECI and -therefore the automatic fan control will not increase the fan speed. - -## Flashing coreboot - -```{eval-rst} -+---------------------+-------------------------+ -| Type | Value | -+=====================+=========================+ -| Socketed flash | No | -+---------------------+-------------------------+ -| Model | W25Q64FVSIG | -+---------------------+-------------------------+ -| Size | 8 MiB | -+---------------------+-------------------------+ -| In circuit flashing | Yes | -+---------------------+-------------------------+ -| Package | SOIC-8 | -+---------------------+-------------------------+ -| Write protection | See below | -+---------------------+-------------------------+ -| Dual BIOS feature | No | -+---------------------+-------------------------+ -| Internal flashing | Yes | -+---------------------+-------------------------+ -``` - -### Flash layout -The original layout of the flash should look like this: -``` -00000000:00000fff fd -00400000:007fffff bios -00001000:003fffff me -00fff000:00000fff gbe -00fff000:00000fff pd -``` - -### Internal programming - -The SPI flash can be accessed using [flashrom] (although it reports as -"N25Q064..3E", it works fine). - -With a missing FDO jumper, `fd` region is read-only, `bios` region is -read-write and `me` region is locked. Vendor firmware will additionally -protect the flash chip. After shorting the FDO jumper (E2) full -read-write access is granted. - -Do **NOT shutdown** the operating system **after flashing** coreboot -from the vendor firmware! This will brick your device because the bios -region will be modified on shutdown. Cut the AC power or do a restart -from the OS. - -**Position of FDO jumper (E2) close to the F_USB3** -![][pro_3500_jumper] - -[pro_3500_jumper]: pro_3500_series_jumper.avif - -### External programming - -External programming with an SPI adapter and [flashrom] does work, but -it powers the whole southbridge complex. The average current will be -400mA but spikes may be higher. Connect the power to the flash or the -programming header next to the flash otherwise programming is unstable. -The supply needs to quickly reach 3V3 or else the chip is also unstable -until cleanly power cycled. - -**Position of SOIC-8 flash and pin-header near ATX power connector** -![][pro_3500_flash] - -[pro_3500_flash]: pro_3500_series_flash.avif - -## Technology - -```{eval-rst} -+------------------+--------------------------------------------------+ -| Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | -+------------------+--------------------------------------------------+ -| Southbridge | bd82x6x (bd82h61) | -+------------------+--------------------------------------------------+ -| CPU | model_206ax | -+------------------+--------------------------------------------------+ -| SuperIO | IT8779E (identifies as IT8772F via register) | -+------------------+--------------------------------------------------+ -| EC | Fixed function as part of SuperIO | -+------------------+--------------------------------------------------+ -| Coprocessor | Intel ME | -+------------------+--------------------------------------------------+ -``` - -[Pro 3500 Series]: https://support.hp.com/us-en/document/c03364089 -[HP]: https://www.hp.com/ -[flashrom]: https://flashrom.org/Flashrom diff --git a/Documentation/mainboard/hp/pro_3x00_series.md b/Documentation/mainboard/hp/pro_3x00_series.md new file mode 100644 index 0000000..a92c4f5 --- /dev/null +++ b/Documentation/mainboard/hp/pro_3x00_series.md @@ -0,0 +1,109 @@ +# HP Pro 3x00 Series + +This page describes how to run coreboot on the [Pro 3400 Series] and [Pro 3500 Series] +desktops from [HP]. + +## State + +All peripherals should work. Automatic fan control as well as S3 are +working. The board was tested to boot Linux and Windows. EHCI debug +is untested. With disabled ME, the SuperIO will not get CPU +temperatures via PECI and therefore the automatic fan control +will not increase the fan speed. + +## Flashing coreboot + +```{eval-rst} ++---------------------+-----------------------------------------+ +| Type | Value | ++=====================+=========================================+ +| Socketed flash | No | ++---------------------+-----------------------------------------+ +| Model | W25Q32BVSIG (3400) / W25Q64FVSIG (3500) | ++---------------------+-----------------------------------------+ +| Size | 4 MiB (3400) / 8 MiB (3500) | ++---------------------+-----------------------------------------+ +| In circuit flashing | Yes | ++---------------------+-----------------------------------------+ +| Package | SOIC-8 | ++---------------------+-----------------------------------------+ +| Write protection | See below | ++---------------------+-----------------------------------------+ +| Dual BIOS feature | No | ++---------------------+-----------------------------------------+ +| Internal flashing | Yes | ++---------------------+-----------------------------------------+ +``` + +### Flash layout +The original layout of the flash should look like this: + +#### Pro 3400 +``` +00000000:00000fff fd +00180000:003fffff bios +00001000:0017ffff me +00fff000:00000fff gbe +00fff000:00000fff pd +``` + +#### Pro 3500 +``` +00000000:00000fff fd +00400000:007fffff bios +00001000:003fffff me +00fff000:00000fff gbe +00fff000:00000fff pd +``` + +### Internal programming + +The SPI flash can be accessed using [flashrom]. + +With a missing FDO jumper, `fd` region is read-only, `bios` region is +read-write and `me` region is locked. Vendor firmware will additionally +protect the flash chip. After shorting the FDO jumper (E2) full +read-write access is granted. + +Do **NOT shutdown** the operating system **after flashing** coreboot +from the vendor firmware! This will brick your device because the bios +region will be modified on shutdown. Cut the AC power or do a restart +from the OS. + +**Position of FDO jumper (E2) close to the F_USB3** + + +### External programming + +External programming with an SPI adapter and [flashrom] does work, but +it powers the whole southbridge complex. The average current will be +400mA but spikes may be higher. Connect the power to the flash or the +programming header next to the flash otherwise programming is unstable. +The supply needs to quickly reach 3V3 or else the chip is also unstable +until cleanly power cycled. + +**Position of SOIC-8 flash and pin-header near ATX power connector** + + +## Technology + +```{eval-rst} ++------------------+--------------------------------------------------+ +| Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | ++------------------+--------------------------------------------------+ +| Southbridge | bd82x6x (bd82h61) | ++------------------+--------------------------------------------------+ +| CPU | model_206ax | ++------------------+--------------------------------------------------+ +| SuperIO | IT8779E (identifies as IT8772F via register) | ++------------------+--------------------------------------------------+ +| EC | Fixed function as part of SuperIO | ++------------------+--------------------------------------------------+ +| Coprocessor | Intel ME | ++------------------+--------------------------------------------------+ +``` + +[Pro 3400 Series]: https://support.hp.com/us-en/product/details/hp-pro-3400-microtower-pc/51601... +[Pro 3500 Series]: https://support.hp.com/us-en/product/details/hp-pro-3500-microtower-pc/52708... +[HP]: https://www.hp.com/ +[flashrom]: https://flashrom.org/Flashrom diff --git a/Documentation/mainboard/hp/pro_3500_series_flash.avif b/Documentation/mainboard/hp/pro_3x00_series_flash.avif similarity index 100% rename from Documentation/mainboard/hp/pro_3500_series_flash.avif rename to Documentation/mainboard/hp/pro_3x00_series_flash.avif Binary files differ diff --git a/Documentation/mainboard/hp/pro_3500_series_jumper.avif b/Documentation/mainboard/hp/pro_3x00_series_jumper.avif similarity index 100% rename from Documentation/mainboard/hp/pro_3500_series_jumper.avif rename to Documentation/mainboard/hp/pro_3x00_series_jumper.avif Binary files differ diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index 1bbacaf..c71ef48 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -131,7 +131,7 @@ Compaq 8200 Elite SFF <hp/compaq_8200_sff.md> Compaq 8300 Elite SFF <hp/compaq_8300_sff.md> Compaq Elite 8300 USDT <hp/compaq_8300_usdt.md> -Pro 3500 Series <hp/pro_3500_series.md> +Pro 3x00 Series <hp/pro_3x00_series.md> Z220 Workstation SFF <hp/z220_sff.md> ```
diff --git a/src/mainboard/hp/pro_3500_series/Kconfig b/src/mainboard/hp/pro_3500_series/Kconfig deleted file mode 100644 index ab77654..0000000 --- a/src/mainboard/hp/pro_3500_series/Kconfig +++ /dev/null @@ -1,37 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later - -if BOARD_HP_PRO_3500_SERIES - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select BOARD_ROMSIZE_KB_8192 - select HAVE_ACPI_RESUME - select HAVE_ACPI_TABLES - select INTEL_GMA_HAVE_VBT - select MAINBOARD_HAS_LIBGFXINIT - select MAINBOARD_USES_IFD_GBE_REGION - select NORTHBRIDGE_INTEL_SANDYBRIDGE - select NO_UART_ON_SUPERIO - select SERIRQ_CONTINUOUS_MODE - select SOUTHBRIDGE_INTEL_BD82X6X - select SUPERIO_ITE_IT8772F - select USE_NATIVE_RAMINIT - -config CBFS_SIZE - default 0x400000 - -config MAINBOARD_DIR - default "hp/pro_3500_series" - -config MAINBOARD_PART_NUMBER - default "Pro 3500 Series" - -config VGA_BIOS_ID - default "8086,0152" - -config DRAM_RESET_GATE_GPIO - default 60 - -config USBDEBUG_HCD_INDEX - default 2 -endif diff --git a/src/mainboard/hp/pro_3x00_series/Kconfig b/src/mainboard/hp/pro_3x00_series/Kconfig new file mode 100644 index 0000000..49bfc54 --- /dev/null +++ b/src/mainboard/hp/pro_3x00_series/Kconfig @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +config BOARD_HP_PRO_3X00_SERIES_COMMON + def_bool n + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select HAVE_CMOS_DEFAULT + select HAVE_OPTION_TABLE + select INTEL_GMA_HAVE_VBT + select MAINBOARD_HAS_LIBGFXINIT + select NORTHBRIDGE_INTEL_SANDYBRIDGE + select NO_UART_ON_SUPERIO + select SERIRQ_CONTINUOUS_MODE + select SOUTHBRIDGE_INTEL_BD82X6X + select SUPERIO_ITE_IT8772F + select USE_NATIVE_RAMINIT + +config BOARD_HP_PRO_3400_SERIES + select BOARD_HP_PRO_3X00_SERIES_COMMON + select BOARD_ROMSIZE_KB_4096 + +config BOARD_HP_PRO_3500_SERIES + select BOARD_HP_PRO_3X00_SERIES_COMMON + select BOARD_ROMSIZE_KB_8192 + +if BOARD_HP_PRO_3X00_SERIES_COMMON + +config CBFS_SIZE + default 0x200000 if BOARD_ROMSIZE_KB_4096 + default 0x400000 if BOARD_ROMSIZE_KB_8192 + +config MAINBOARD_DIR + default "hp/pro_3x00_series" + +config VARIANT_DIR + default "pro_3400_series" if BOARD_HP_PRO_3400_SERIES + default "pro_3500_series" if BOARD_HP_PRO_3500_SERIES + +config MAINBOARD_PART_NUMBER + default "Pro 3400 Series" if BOARD_HP_PRO_3400_SERIES + default "Pro 3500 Series" if BOARD_HP_PRO_3500_SERIES + +config OVERRIDE_DEVICETREE + default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" + +config INTEL_GMA_VBT_FILE + default "src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt" + +config DRAM_RESET_GATE_GPIO + default 60 + +config USBDEBUG_HCD_INDEX + default 2 +endif diff --git a/src/mainboard/hp/pro_3500_series/Kconfig.name b/src/mainboard/hp/pro_3x00_series/Kconfig.name similarity index 64% rename from src/mainboard/hp/pro_3500_series/Kconfig.name rename to src/mainboard/hp/pro_3x00_series/Kconfig.name index fd1222c..fea2e4f 100644 --- a/src/mainboard/hp/pro_3500_series/Kconfig.name +++ b/src/mainboard/hp/pro_3x00_series/Kconfig.name @@ -1,4 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later
+config BOARD_HP_PRO_3400_SERIES + bool "Pro 3400 Series" + config BOARD_HP_PRO_3500_SERIES bool "Pro 3500 Series" diff --git a/src/mainboard/hp/pro_3500_series/Makefile.mk b/src/mainboard/hp/pro_3x00_series/Makefile.mk similarity index 69% rename from src/mainboard/hp/pro_3500_series/Makefile.mk rename to src/mainboard/hp/pro_3x00_series/Makefile.mk index 6554ed5..bc01687 100644 --- a/src/mainboard/hp/pro_3500_series/Makefile.mk +++ b/src/mainboard/hp/pro_3x00_series/Makefile.mk @@ -1,11 +1,11 @@ # SPDX-License-Identifier: GPL-2.0-or-later
bootblock-y += early_init.c -bootblock-y += gpio.c +bootblock-y += variants/$(VARIANT_DIR)/gpio.c bootblock-y += led.c
romstage-y += early_init.c -romstage-y += gpio.c +romstage-y += variants/$(VARIANT_DIR)/gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
diff --git a/src/mainboard/hp/pro_3500_series/acpi/ec.asl b/src/mainboard/hp/pro_3x00_series/acpi/ec.asl similarity index 100% rename from src/mainboard/hp/pro_3500_series/acpi/ec.asl rename to src/mainboard/hp/pro_3x00_series/acpi/ec.asl diff --git a/src/mainboard/hp/pro_3500_series/acpi/platform.asl b/src/mainboard/hp/pro_3x00_series/acpi/platform.asl similarity index 100% rename from src/mainboard/hp/pro_3500_series/acpi/platform.asl rename to src/mainboard/hp/pro_3x00_series/acpi/platform.asl diff --git a/src/mainboard/hp/pro_3500_series/acpi/superio.asl b/src/mainboard/hp/pro_3x00_series/acpi/superio.asl similarity index 100% rename from src/mainboard/hp/pro_3500_series/acpi/superio.asl rename to src/mainboard/hp/pro_3x00_series/acpi/superio.asl diff --git a/src/mainboard/hp/pro_3500_series/acpi_tables.c b/src/mainboard/hp/pro_3x00_series/acpi_tables.c similarity index 100% rename from src/mainboard/hp/pro_3500_series/acpi_tables.c rename to src/mainboard/hp/pro_3x00_series/acpi_tables.c diff --git a/src/mainboard/hp/pro_3x00_series/board_info.txt b/src/mainboard/hp/pro_3x00_series/board_info.txt new file mode 100644 index 0000000..7114c27 --- /dev/null +++ b/src/mainboard/hp/pro_3x00_series/board_info.txt @@ -0,0 +1,5 @@ +Category: desktop +ROM package: SOIC-8 +ROM socketed: no +Flashrom support: yes +Release year: 2011-2012 diff --git a/src/mainboard/hp/pro_3x00_series/cmos.default b/src/mainboard/hp/pro_3x00_series/cmos.default new file mode 100644 index 0000000..ed38e81 --- /dev/null +++ b/src/mainboard/hp/pro_3x00_series/cmos.default @@ -0,0 +1,8 @@ +## SPDX-License-Identifier: GPL-2.0-only + +boot_option=Fallback +debug_level=Debug +gfx_uma_size=64M +nmi=Enable +power_on_after_fail=Disable +sata_mode=AHCI diff --git a/src/mainboard/hp/pro_3x00_series/cmos.layout b/src/mainboard/hp/pro_3x00_series/cmos.layout new file mode 100644 index 0000000..1fea37c --- /dev/null +++ b/src/mainboard/hp/pro_3x00_series/cmos.layout @@ -0,0 +1,76 @@ +## SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# start-bit length config enum-ID name +0 384 r 0 reserved_memory + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 3 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 4 debug_level + +# coreboot config options: southbridge +408 1 e 1 nmi +409 2 e 5 power_on_after_fail +411 1 e 6 sata_mode + +# coreboot config options: northbridge +412 3 e 7 gfx_uma_size + +# SandyBridge MRC Scrambler Seed values +896 32 r 0 mrc_scrambler_seed +928 32 r 0 mrc_scrambler_seed_s3 +960 16 r 0 mrc_scrambler_seed_chk + +# coreboot config options: check sums +984 16 h 0 check_sum + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable + +2 0 Enable +2 1 Disable + +3 0 Fallback +3 1 Normal + +4 0 Emergency +4 1 Alert +4 2 Critical +4 3 Error +4 4 Warning +4 5 Notice +4 6 Info +4 7 Debug +4 8 Spew + +5 0 Disable +5 1 Enable +5 2 Keep + +6 0 AHCI +6 1 Compatible + +7 0 32M +7 1 64M +7 2 96M +7 3 128M +7 4 160M +7 5 192M +7 6 224M + +# ----------------------------------------------------------------- +checksums + +checksum 392 415 984 diff --git a/src/mainboard/hp/pro_3500_series/common_defines.h b/src/mainboard/hp/pro_3x00_series/common_defines.h similarity index 100% rename from src/mainboard/hp/pro_3500_series/common_defines.h rename to src/mainboard/hp/pro_3x00_series/common_defines.h diff --git a/src/mainboard/hp/pro_3500_series/devicetree.cb b/src/mainboard/hp/pro_3x00_series/devicetree.cb similarity index 100% rename from src/mainboard/hp/pro_3500_series/devicetree.cb rename to src/mainboard/hp/pro_3x00_series/devicetree.cb diff --git a/src/mainboard/hp/pro_3500_series/dsdt.asl b/src/mainboard/hp/pro_3x00_series/dsdt.asl similarity index 99% rename from src/mainboard/hp/pro_3500_series/dsdt.asl rename to src/mainboard/hp/pro_3x00_series/dsdt.asl index cbdf0c6..cee4939 100644 --- a/src/mainboard/hp/pro_3500_series/dsdt.asl +++ b/src/mainboard/hp/pro_3x00_series/dsdt.asl @@ -1,8 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ + #define BRIGHTNESS_UP _SB.PCI0.GFX0.INCB #define BRIGHTNESS_DOWN _SB.PCI0.GFX0.DECB - - #include <acpi/acpi.h>
DefinitionBlock( diff --git a/src/mainboard/hp/pro_3500_series/early_init.c b/src/mainboard/hp/pro_3x00_series/early_init.c similarity index 69% rename from src/mainboard/hp/pro_3500_series/early_init.c rename to src/mainboard/hp/pro_3x00_series/early_init.c index fbf73cfb..1e149b5 100644 --- a/src/mainboard/hp/pro_3500_series/early_init.c +++ b/src/mainboard/hp/pro_3x00_series/early_init.c @@ -8,23 +8,6 @@ #include "common_defines.h" #include "led.h"
-const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 6, 0 }, - { 1, 6, 0 }, - { 1, 6, 1 }, - { 1, 9, 1 }, - { 1, 10, 2 }, - { 1, 11, 2 }, - { 1, 6, 3 }, - { 1, 6, 3 }, - { 1, 6, 4 }, - { 1, 12, 4 }, - { 1, 6, 6 }, - { 1, 11, 5 }, - { 1, 6, 5 }, - { 1, 6, 6 }, -}; - void bootblock_mainboard_early_init(void) { pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | KBC_LPC_EN); diff --git a/src/mainboard/hp/pro_3500_series/gma-mainboard.ads b/src/mainboard/hp/pro_3x00_series/gma-mainboard.ads similarity index 100% rename from src/mainboard/hp/pro_3500_series/gma-mainboard.ads rename to src/mainboard/hp/pro_3x00_series/gma-mainboard.ads diff --git a/src/mainboard/hp/pro_3500_series/hda_verb.c b/src/mainboard/hp/pro_3x00_series/hda_verb.c similarity index 100% rename from src/mainboard/hp/pro_3500_series/hda_verb.c rename to src/mainboard/hp/pro_3x00_series/hda_verb.c diff --git a/src/mainboard/hp/pro_3500_series/led.c b/src/mainboard/hp/pro_3x00_series/led.c similarity index 100% rename from src/mainboard/hp/pro_3500_series/led.c rename to src/mainboard/hp/pro_3x00_series/led.c diff --git a/src/mainboard/hp/pro_3500_series/led.h b/src/mainboard/hp/pro_3x00_series/led.h similarity index 100% rename from src/mainboard/hp/pro_3500_series/led.h rename to src/mainboard/hp/pro_3x00_series/led.h diff --git a/src/mainboard/hp/pro_3500_series/mainboard.c b/src/mainboard/hp/pro_3x00_series/mainboard.c similarity index 100% rename from src/mainboard/hp/pro_3500_series/mainboard.c rename to src/mainboard/hp/pro_3x00_series/mainboard.c diff --git a/src/mainboard/hp/pro_3500_series/smihandler.c b/src/mainboard/hp/pro_3x00_series/smihandler.c similarity index 100% rename from src/mainboard/hp/pro_3500_series/smihandler.c rename to src/mainboard/hp/pro_3x00_series/smihandler.c diff --git a/src/mainboard/hp/pro_3500_series/board_info.txt b/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/board_info.txt similarity index 65% copy from src/mainboard/hp/pro_3500_series/board_info.txt copy to src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/board_info.txt index 1780394..c1de6a7 100644 --- a/src/mainboard/hp/pro_3500_series/board_info.txt +++ b/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/board_info.txt @@ -1,6 +1,6 @@ Category: desktop +ROM IC: W25Q32BVSIG ROM package: SOIC-8 -ROM protocol: SPI ROM socketed: n Flashrom support: y -Release year: 2012 +Release year: 2011 diff --git a/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/data.vbt b/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/data.vbt new file mode 100644 index 0000000..b7cb35a --- /dev/null +++ b/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/data.vbt Binary files differ diff --git a/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/gpio.c b/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/gpio.c new file mode 100644 index 0000000..bac321c --- /dev/null +++ b/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/gpio.c @@ -0,0 +1,189 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <southbridge/intel/common/gpio.h> + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_NATIVE, + .gpio3 = GPIO_MODE_NATIVE, + .gpio4 = GPIO_MODE_NATIVE, + .gpio5 = GPIO_MODE_NATIVE, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_NATIVE, + .gpio11 = GPIO_MODE_NATIVE, + .gpio12 = GPIO_MODE_GPIO, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_NATIVE, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_NATIVE, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_NATIVE, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_NATIVE, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_NATIVE, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_GPIO, + .gpio30 = GPIO_MODE_NATIVE, + .gpio31 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_OUTPUT, + .gpio12 = GPIO_DIR_INPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_OUTPUT, + .gpio16 = GPIO_DIR_INPUT, + .gpio17 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_INPUT, + .gpio24 = GPIO_DIR_OUTPUT, + .gpio27 = GPIO_DIR_INPUT, + .gpio28 = GPIO_DIR_OUTPUT, + .gpio29 = GPIO_DIR_OUTPUT, + .gpio31 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio8 = GPIO_LEVEL_HIGH, + .gpio15 = GPIO_LEVEL_LOW, + .gpio24 = GPIO_LEVEL_LOW, + .gpio28 = GPIO_LEVEL_LOW, + .gpio29 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_reset = { +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio13 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_GPIO, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_GPIO, + .gpio44 = GPIO_MODE_NATIVE, + .gpio45 = GPIO_MODE_NATIVE, + .gpio46 = GPIO_MODE_NATIVE, + .gpio47 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_GPIO, + .gpio50 = GPIO_MODE_NATIVE, + .gpio51 = GPIO_MODE_NATIVE, + .gpio52 = GPIO_MODE_NATIVE, + .gpio53 = GPIO_MODE_NATIVE, + .gpio54 = GPIO_MODE_NATIVE, + .gpio55 = GPIO_MODE_NATIVE, + .gpio56 = GPIO_MODE_NATIVE, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_GPIO, + .gpio61 = GPIO_MODE_GPIO, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio32 = GPIO_DIR_OUTPUT, + .gpio33 = GPIO_DIR_OUTPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio35 = GPIO_DIR_INPUT, + .gpio36 = GPIO_DIR_INPUT, + .gpio37 = GPIO_DIR_INPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, + .gpio43 = GPIO_DIR_INPUT, + .gpio48 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_INPUT, + .gpio60 = GPIO_DIR_OUTPUT, + .gpio61 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio32 = GPIO_LEVEL_HIGH, + .gpio33 = GPIO_LEVEL_HIGH, + .gpio60 = GPIO_LEVEL_LOW, + .gpio61 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_reset = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_NATIVE, + .gpio65 = GPIO_MODE_NATIVE, + .gpio66 = GPIO_MODE_NATIVE, + .gpio67 = GPIO_MODE_NATIVE, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_GPIO, + .gpio71 = GPIO_MODE_GPIO, + .gpio72 = GPIO_MODE_GPIO, + .gpio73 = GPIO_MODE_NATIVE, + .gpio74 = GPIO_MODE_NATIVE, + .gpio75 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio68 = GPIO_DIR_INPUT, + .gpio69 = GPIO_DIR_INPUT, + .gpio70 = GPIO_DIR_INPUT, + .gpio71 = GPIO_DIR_INPUT, + .gpio72 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_level = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_reset = { +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + .reset = &pch_gpio_set1_reset, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + .reset = &pch_gpio_set2_reset, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + .reset = &pch_gpio_set3_reset, + }, +}; diff --git a/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/overridetree.cb b/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/overridetree.cb new file mode 100644 index 0000000..d2ba0f6 --- /dev/null +++ b/src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/overridetree.cb @@ -0,0 +1,28 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/intel/sandybridge + device domain 0x0 on + + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + register "usb_port_config" = "{ + { 0, 6, -1 }, + { 1, 6, 0 }, + { 1, 6, 0 }, + { 1, 6, 1 }, + { 1, 6, 1 }, + { 1, 6, 2 }, + { 0, 6, -1 }, + { 0, 6, -1 }, + { 1, 12, 5 }, + { 1, 12, 5 }, + { 1, 12, 6 }, + { 1, 12, 6 }, + { 0, 6, -1 }, + { 0, 6, -1 }, + }" + + device ref mei1 off end + device ref pci_bridge off end + end + end +end diff --git a/src/mainboard/hp/pro_3500_series/board_info.txt b/src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/board_info.txt similarity index 82% rename from src/mainboard/hp/pro_3500_series/board_info.txt rename to src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/board_info.txt index 1780394..aaa2ab1 100644 --- a/src/mainboard/hp/pro_3500_series/board_info.txt +++ b/src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/board_info.txt @@ -1,6 +1,6 @@ Category: desktop +ROM IC: W25Q64FVSIG ROM package: SOIC-8 -ROM protocol: SPI ROM socketed: n Flashrom support: y Release year: 2012 diff --git a/src/mainboard/hp/pro_3500_series/data.vbt b/src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/data.vbt similarity index 100% rename from src/mainboard/hp/pro_3500_series/data.vbt rename to src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/data.vbt Binary files differ diff --git a/src/mainboard/hp/pro_3500_series/gpio.c b/src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/gpio.c similarity index 100% rename from src/mainboard/hp/pro_3500_series/gpio.c rename to src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/gpio.c diff --git a/src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/overridetree.cb b/src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/overridetree.cb new file mode 100644 index 0000000..c06b68a --- /dev/null +++ b/src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/overridetree.cb @@ -0,0 +1,25 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/intel/sandybridge + device domain 0x0 on + + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + register "usb_port_config" = "{ + { 1, 6, 0 }, + { 1, 6, 0 }, + { 1, 6, 1 }, + { 1, 9, 1 }, + { 1, 10, 2 }, + { 1, 11, 2 }, + { 1, 6, 3 }, + { 1, 6, 3 }, + { 1, 6, 4 }, + { 1, 12, 4 }, + { 1, 6, 6 }, + { 1, 11, 5 }, + { 1, 6, 5 }, + { 1, 6, 6 }, + }" + end + end +end