[coreboot-gerrit] Change in coreboot[master]: nb/intel/x4x/raminit: Fix Clock Enable on DDR3

[Arthur Heymans (Code Review)]

Attention is currently required from: Damien Zammit, Angel Pons, Arthur Heymans.
Hello build bot (Jenkins), Damien Zammit, Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/50353

to look at the new patch set (#3).

Change subject: nb/intel/x4x/raminit: Fix Clock Enable on DDR3
......................................................................

nb/intel/x4x/raminit: Fix Clock Enable on DDR3

On Asus P5QC this allows raminit to progress further (there are still
other issues).

Add a comment why the code differs from the reference code (or what
the blob on Intel boards does).

Change-Id: Ie1eb77ed2d2b563fb3b92ca33b900f7d1dbc85fe
Signed-off-by: Arthur Heymans 
---
M src/northbridge/intel/x4x/raminit_ddr23.c
1 file changed, 14 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/50353/3