build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44578 )
Change subject: mb/supermicro/x11-lga1151v2-series: Add x11sch-l4nf support ......................................................................
Patch Set 2:
(99 comments)
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151v2-series/variants/x11sch-l4nf/gpio.c:
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 19: _PAD_CFG_STRUCT(GPP_A0, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* ESPI_ALERT1# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 20: _PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_IO0 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 21: _PAD_CFG_STRUCT(GPP_A2, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* ESPI_IO1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 22: _PAD_CFG_STRUCT(GPP_A3, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_IO2 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 23: _PAD_CFG_STRUCT(GPP_A4, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_IO3 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 24: _PAD_CFG_STRUCT(GPP_A5, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_CS0# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 25: _PAD_CFG_STRUCT(GPP_A6, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 26: _PAD_CFG_STRUCT(GPP_A7, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* ESPI_ALERT0# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 27: _PAD_CFG_STRUCT(GPP_A8, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* CLKRUN# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 28: _PAD_CFG_STRUCT(GPP_A9, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_CLK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 29: _PAD_CFG_STRUCT(GPP_A10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0), /* CLKOUT_LPC1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 30: _PAD_CFG_STRUCT(GPP_A11, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 31: _PAD_CFG_STRUCT(GPP_A12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 32: _PAD_CFG_STRUCT(GPP_A13, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0), /* SUSWARN#/SUSPWRDNACK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 33: _PAD_CFG_STRUCT(GPP_A14, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* ESPI_RESET# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 34: _PAD_CFG_STRUCT(GPP_A15, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SUSACK# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 39: _PAD_CFG_STRUCT(GPP_A20, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 46: _PAD_CFG_STRUCT(GPP_B1, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 47: _PAD_CFG_STRUCT(GPP_B2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 51: _PAD_CFG_STRUCT(GPP_B6, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 57: _PAD_CFG_STRUCT(GPP_B12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SLP_S0# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 58: _PAD_CFG_STRUCT(GPP_B13, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* PLTRST# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 59: _PAD_CFG_STRUCT(GPP_B14, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SPKR */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 63: _PAD_CFG_STRUCT(GPP_B18, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 68: _PAD_CFG_STRUCT(GPP_B23, PAD_FUNC(NF2) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* PCHHOT# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 75: _PAD_CFG_STRUCT(GPP_C2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 81: _PAD_CFG_STRUCT(GPP_C8, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 87: _PAD_CFG_STRUCT(GPP_C14, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 89: _PAD_CFG_STRUCT(GPP_C16, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1), 0), /* I2C0_SDA */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 90: _PAD_CFG_STRUCT(GPP_C17, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1), 0), /* I2C0_SCL */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 91: _PAD_CFG_STRUCT(GPP_C18, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1), 0), /* I2C1_SDA */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 92: _PAD_CFG_STRUCT(GPP_C19, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | (1 << 1), 0), /* I2C1_SCL */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 95: _PAD_CFG_STRUCT(GPP_C22, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 96: _PAD_CFG_STRUCT(GPP_C23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 99: _PAD_CFG_STRUCT(GPP_D0, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 102: _PAD_CFG_STRUCT(GPP_D3, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 103: _PAD_CFG_STRUCT(GPP_D4, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 144: _PAD_CFG_STRUCT(GPD1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* ACPRESENT */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 145: _PAD_CFG_STRUCT(GPD2, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* LAN_WAKE# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 146: _PAD_CFG_STRUCT(GPD3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* PRWBTN# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 147: _PAD_CFG_STRUCT(GPD4, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SLP_S3# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 148: _PAD_CFG_STRUCT(GPD5, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SLP_S4# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 149: _PAD_CFG_STRUCT(GPD6, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0), /* SLP_A# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 150: _PAD_CFG_STRUCT(GPD7, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 151: _PAD_CFG_STRUCT(GPD8, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SUSCLK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 153: _PAD_CFG_STRUCT(GPD10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SLP_S5# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 159: _PAD_CFG_STRUCT(GPP_K0, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 160: _PAD_CFG_STRUCT(GPP_K1, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 161: _PAD_CFG_STRUCT(GPP_K2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 162: _PAD_CFG_STRUCT(GPP_K3, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 171: _PAD_CFG_STRUCT(GPP_K12, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 176: _PAD_CFG_STRUCT(GPP_K17, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 178: _PAD_CFG_STRUCT(GPP_K19, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SMI# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 181: _PAD_CFG_STRUCT(GPP_K22, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 182: _PAD_CFG_STRUCT(GPP_K23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 187: _PAD_CFG_STRUCT(GPP_H2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 200: _PAD_CFG_STRUCT(GPP_H15, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 203: _PAD_CFG_STRUCT(GPP_H18, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 212: _PAD_CFG_STRUCT(GPP_E1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* SATAXPCIE1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 214: _PAD_CFG_STRUCT(GPP_E3, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 216: _PAD_CFG_STRUCT(GPP_E5, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 217: _PAD_CFG_STRUCT(GPP_E6, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 219: _PAD_CFG_STRUCT(GPP_E8, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SATALED# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 220: _PAD_CFG_STRUCT(GPP_E9, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC0# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 221: _PAD_CFG_STRUCT(GPP_E10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC1# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 222: _PAD_CFG_STRUCT(GPP_E11, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC2# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 223: _PAD_CFG_STRUCT(GPP_E12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC3# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 231: _PAD_CFG_STRUCT(GPP_F5, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 233: _PAD_CFG_STRUCT(GPP_F7, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 234: _PAD_CFG_STRUCT(GPP_F8, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 235: _PAD_CFG_STRUCT(GPP_F9, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 236: _PAD_CFG_STRUCT(GPP_F10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SATA_SCLOCK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 237: _PAD_CFG_STRUCT(GPP_F11, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SATA_SLOAD */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 238: _PAD_CFG_STRUCT(GPP_F12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SATA_SDATAOUT1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 239: _PAD_CFG_STRUCT(GPP_F13, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* SATA_SDATAOUT0 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 241: _PAD_CFG_STRUCT(GPP_F15, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC4# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 242: _PAD_CFG_STRUCT(GPP_F16, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* USB2_OC5# */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 256: _PAD_CFG_STRUCT(GPP_I0, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* DDPB_HPD0 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 257: _PAD_CFG_STRUCT(GPP_I1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* DDPB_HPD1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 258: _PAD_CFG_STRUCT(GPP_I2, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* DDPB_HPD2 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 259: _PAD_CFG_STRUCT(GPP_I3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), 0), /* DDPB_HPD3 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 260: _PAD_CFG_STRUCT(GPP_I4, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), 0), /* EDP_HPD */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 261: _PAD_CFG_STRUCT(GPP_I5, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), 0), /* DDPB_CTRLCLK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 262: _PAD_CFG_STRUCT(GPP_I6, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* DDPB_CTRLDATA */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 263: _PAD_CFG_STRUCT(GPP_I7, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), 0), /* DDPC_CTRLCLK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 264: _PAD_CFG_STRUCT(GPP_I8, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), 0), /* DDPC_CTRLDATA */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 265: _PAD_CFG_STRUCT(GPP_I9, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(20K_PD)), /* DDPD_CTRLCLK */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 266: _PAD_CFG_STRUCT(GPP_I10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(20K_PD)), /* DDPD_CTRLDATA */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 267: _PAD_CFG_STRUCT(GPP_I11, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* M2_SKT2_CFG0 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 268: _PAD_CFG_STRUCT(GPP_I12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* M2_SKT2_CFG1 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 269: _PAD_CFG_STRUCT(GPP_I13, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* M2_SKT2_CFG2 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 270: _PAD_CFG_STRUCT(GPP_I14, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), PAD_PULL(NATIVE)), /* M2_SKT2_CFG3 */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 273: _PAD_CFG_STRUCT(GPP_J0, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* CNV_PA_BLANKING */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 274: _PAD_CFG_STRUCT(GPP_J1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_BUF(TX_RX_DISABLE), PAD_PULL(NATIVE)), /* n/a */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 275: _PAD_CFG_STRUCT(GPP_J2, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* n/a */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 276: _PAD_CFG_STRUCT(GPP_J3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* n/a */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 282: _PAD_CFG_STRUCT(GPP_J9, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 283: _PAD_CFG_STRUCT(GPP_J10, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters
https://review.coreboot.org/c/coreboot/+/44578/2/src/mainboard/supermicro/x1... PS2, Line 284: _PAD_CFG_STRUCT(GPP_J11, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), /* GPIO */ line over 96 characters