Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35173 )
Change subject: soc/skylake: prevent null pointer dereferences ......................................................................
soc/skylake: prevent null pointer dereferences
Change-Id: Ide10223e7fc37a6c4bfa408234ef3efe1846236a Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/35173 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com --- M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip_fsp20.c 2 files changed, 19 insertions(+), 20 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index a7d5872..212c244 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -153,10 +153,7 @@
/* Enable ISH if device is on */ dev = pcidev_path_on_root(PCH_DEVFN_ISH); - if (dev) - params->IshEnable = dev->enabled; - else - params->IshEnable = 0; + params->IshEnable = dev ? dev->enabled : 0;
params->EnableAzalia = config->EnableAzalia; params->IoBufferOwnership = config->IoBufferOwnership; @@ -210,23 +207,24 @@ * do the changes and then lock it back in coreboot * */ - if (config->HeciEnabled == 0) - params->PsfUnlock = 1; - else - params->PsfUnlock = 0; + params->PsfUnlock = !config->HeciEnabled;
for (i = 0; i < ARRAY_SIZE(config->domain_vr_config); i++) fill_vr_domain_config(params, i, &config->domain_vr_config[i]);
/* Show SPI controller if enabled in devicetree.cb */ dev = pcidev_path_on_root(PCH_DEVFN_SPI); - params->ShowSpiController = dev->enabled; + params->ShowSpiController = dev ? dev->enabled : 0;
/* Enable xDCI controller if enabled in devicetree and allowed */ dev = pcidev_path_on_root(PCH_DEVFN_USBOTG); - if (!xdci_can_enable()) - dev->enabled = 0; - params->XdciEnable = dev->enabled; + if (dev) { + if (!xdci_can_enable()) + dev->enabled = 0; + params->XdciEnable = dev->enabled; + } else { + params->XdciEnable = 0; + }
params->SendVrMbxCmd = config->SendVrMbxCmd;
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 85d3edf..e9c37d6 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -354,10 +354,7 @@
/* If ISH is enabled, enable ISH elements */ dev = pcidev_path_on_root(PCH_DEVFN_ISH); - if (dev) - params->PchIshEnable = dev->enabled; - else - params->PchIshEnable = 0; + params->PchIshEnable = dev ? dev->enabled : 0;
params->PchHdaEnable = config->EnableAzalia; params->PchHdaIoBufferOwnership = config->IoBufferOwnership; @@ -433,13 +430,17 @@
/* Show SPI controller if enabled in devicetree.cb */ dev = pcidev_path_on_root(PCH_DEVFN_SPI); - params->ShowSpiController = dev->enabled; + params->ShowSpiController = dev ? dev->enabled : 0;
/* Enable xDCI controller if enabled in devicetree and allowed */ dev = pcidev_path_on_root(PCH_DEVFN_USBOTG); - if (!xdci_can_enable()) - dev->enabled = 0; - params->XdciEnable = dev->enabled; + if (dev) { + if (!xdci_can_enable()) + dev->enabled = 0; + params->XdciEnable = dev->enabled; + } else { + params->XdciEnable = 0; + }
/* Enable or disable Gaussian Mixture Model in devicetree */ dev = pcidev_path_on_root(SA_DEVFN_GMM);