Hello build bot (Jenkins), Nico Huber, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46683
to look at the new patch set (#6).
Change subject: nb/intel/haswell/early_init.c: Remove invalid register writes ......................................................................
nb/intel/haswell/early_init.c: Remove invalid register writes
MRC does not use the value of SSKPD, and will overwrite it with constant values at the end of memory initialisation. Since coreboot does not rely on this particular bit's value, it is safe to drop the writes to set it.
MCHBAR register 0x6120 is undocumented. It is nowhere to be found in any documentation or code I have access to; not even for Sandy/Ivy Bridge, the platform where this mysterious register write originally came from.
These workarounds were copied from Sandy Bridge, but do not apply to Haswell. They were dropped on Broadwell, so drop them for Haswell too.
Tested on Asrock B85M Pro4, still boots.
Change-Id: I21d9656a7595d47ac8648c08d223b7cbafd213c3 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/haswell/early_init.c 1 file changed, 0 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/46683/6