[coreboot-gerrit] Change in coreboot[master]: soc/skylake: do not rely on P2SB data to generate DRHD

[Angel Pons (Code Review)]

Hello Kyösti Mälkki, Patrick Rudolph, Maxim Polyakov, Matt DeVillier, build bot (Jenkins), Nico Huber,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35108

to look at the new patch set (#5).

Change subject: soc/skylake: do not rely on P2SB data to generate DRHD
......................................................................

soc/skylake: do not rely on P2SB data to generate DRHD

The P2SB PCI device can be "hidden", which causes all sorts of
nightmares and bugs. Moreover, FSP tends to hide it, so finding
a good solution to this problem is impossible with FSP into the mix.

Since the values for IBDF and HBDF were already hardcoded as FSP
parameters, define them as macros and use these values directly to
generate the DRHD.

Change-Id: I7eb20182380b953a1842083e7a3c67919d6971b9
Signed-off-by: Angel Pons 
---
M src/soc/intel/skylake/acpi.c
M src/soc/intel/skylake/chip_fsp20.c
M src/soc/intel/skylake/include/soc/systemagent.h
M src/soc/intel/skylake/romstage/romstage_fsp20.c
4 files changed, 22 insertions(+), 23 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/35108/5