Wonkyu Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39413 )
Change subject: mb/google/voteer: configure L1Substate for PCIe ......................................................................
mb/google/voteer: configure L1Substate for PCIe
Limit PcieL1Substate for RP9, RP11 for ES1 NVMe warm reboot workaround.
BUG=none BRANCH=none TEST= boot to OS and check warm reboot with NVMe
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: Ie85bf71c43427e326ef2ba674da4566f8f51495a --- M src/mainboard/google/volteer/variants/ripto/overridetree.cb 1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/39413/1
diff --git a/src/mainboard/google/volteer/variants/ripto/overridetree.cb b/src/mainboard/google/volteer/variants/ripto/overridetree.cb index 32204c5..58cedb5 100644 --- a/src/mainboard/google/volteer/variants/ripto/overridetree.cb +++ b/src/mainboard/google/volteer/variants/ripto/overridetree.cb @@ -1,5 +1,10 @@ chip soc/intel/tigerlake
+ # NVMe warm reboot workaround + # Limit L1.1(value:2) for RP9, RP11 + register "PcieRpL1Substates[8]" = "2" + register "PcieRpL1Substates[10]" = "2" + device domain 0 on end