Hello V Sowmya,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/33233
to review the following change.
Change subject: soc/intel/cannonlake: Add _DSM method for SD controller ......................................................................
soc/intel/cannonlake: Add _DSM method for SD controller
Change-Id: I15090ed9f9bc90b35dfcba47c913e3d37b799d0b Signed-off-by: V Sowmya v.sowmya@intel.com --- M src/soc/intel/cannonlake/acpi/scs.asl 1 file changed, 61 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/33233/1
diff --git a/src/soc/intel/cannonlake/acpi/scs.asl b/src/soc/intel/cannonlake/acpi/scs.asl index cdfff91..924228e 100644 --- a/src/soc/intel/cannonlake/acpi/scs.asl +++ b/src/soc/intel/cannonlake/acpi/scs.asl @@ -95,6 +95,67 @@ PGEN, 1, /* PG_ENABLE */ }
+ /* _DSM x86 Device Specific Method + * Arg0: UUID Unique function identifier + * Arg1: Integer Revision Level + * Arg2: Integer Function Index (0 = Return Supported Functions) + * Arg3: Package Parameters + */ + Method (_DSM, 4) + { + If(LEqual(Arg0, ToUUID("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61"))) { + /* Check the revision */ + If(LGreaterEqual(Arg1, Zero)) { + /* Switch statement based on the function index. */ + Switch(ToInteger(Arg2)) { + /* + * Function Index 0 the return value is a buffer containing + * one bit for each function index, starting with zero. + * Bit 0 - Indicates whether there is support for any functions other than function 0. + * Bit 1 - Indicates support to clear power control register + * Bit 2 - Indicates support to set power control register + * Bit 3 - Indicates support to set 1.8V signalling + * Bit 4 - Indicates support to set 3.3V signalling + * Bit 5 - Indicates support for HS200 mode + * Bit 6 - Indicates support for HS400 mode + * Bit 9 - Indicates eMMC I/O Driver Strength + */ + /* + * For SD we have to support functions to + * set 1.8V signalling and 3.3V signalling [BIT4, BIT3] + */ + Case(0) { + Return (Buffer() {0x19}) + } + + /* + * Function Index 3: Set 1.8v signalling. + * We put a sleep of 100ms in this method to + * work around a known issue with detecting + * UHS SD card on PCH. This is to compensate + * for the SD VR slowness. + */ + Case(3) { + Sleep (100) // Sleep 100ms + Return(Buffer(){0x00}) + } + /* + * Function Index 4: Set 3.3v signalling. + * We put a sleep of 100ms in this method to + * work around a known issue with detecting + * UHS SD card on PCH. This is to compensate + * for the SD VR slowness. + */ + Case(4) { + Sleep (100) // Sleep 100ms + Return(Buffer(){0x00}) + } + } // End - Switch(Arg2) + } + } // End - UUID check + Return(Buffer() {0x0}) + } // End _DSM + Method(_INI) { /* Clear register 0x1C20/0x4820 */