[coreboot-gerrit] Change in coreboot[master]: soc/amd/common: Handle power resume after power failure

[Felix Held (Code Review)]

Attention is currently required from: Jason Glenesk, Martin Roth, Marshall Dawson, Karthik Ramasubramanian.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51924 )

Change subject: soc/amd/common: Handle power resume after power failure
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Patch Set 6:

(1 comment)

File src/soc/amd/common/block/pm/pmlib.c:

https://review.coreboot.org/c/coreboot/+/51924/comment/5ccb120a_7ef72291 
PS6, Line 40: 	val = pm_io_read8(PM_RTC_SHADOW_REG) & ~PWR_FAIL_MASK;
had a look in the agesa reference code (FchAcLossControl) and it masks off the 4 least significant bits, sets bit 2 and sets bits 0 and 1 according to the setting. this code doesn't clear bit 3