Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37051 )
Change subject: cpu/intel/common/fsb.c: Drop CAR_GLOBAL_MIGRATION support ......................................................................
cpu/intel/common/fsb.c: Drop CAR_GLOBAL_MIGRATION support
Change-Id: I151090c8d7f670f121dc7e4cbebfd720034fde33 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/common/fsb.c 1 file changed, 10 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/37051/1
diff --git a/src/cpu/intel/common/fsb.c b/src/cpu/intel/common/fsb.c index 0004ead..29cadf4 100644 --- a/src/cpu/intel/common/fsb.c +++ b/src/cpu/intel/common/fsb.c @@ -11,7 +11,6 @@ * GNU General Public License for more details. */
-#include <arch/early_variables.h> #include <cpu/x86/msr.h> #include <cpu/x86/tsc.h> #include <cpu/intel/speedstep.h> @@ -20,8 +19,8 @@ #include <commonlib/helpers.h> #include <delay.h>
-static u32 g_timer_fsb CAR_GLOBAL; -static u32 g_timer_tsc CAR_GLOBAL; +static u32 g_timer_fsb; +static u32 g_timer_tsc;
/* This is not an architectural MSR. */ #define MSR_PLATFORM_INFO 0xce @@ -99,8 +98,8 @@ ret = get_fsb_tsc(&fsb, &ratio); if (ret == 0) { u32 tsc = 100 * DIV_ROUND_CLOSEST(ratio * fsb, 100); - car_set_var(g_timer_fsb, fsb); - car_set_var(g_timer_tsc, tsc); + g_timer_fsb = fsb; + g_timer_tsc = tsc; return; }
@@ -110,8 +109,8 @@ printk(BIOS_ERR, "CPU not supported\n");
/* Set some semi-ridiculous defaults. */ - car_set_var(g_timer_fsb, 500); - car_set_var(g_timer_tsc, 5000); + g_timer_fsb = 500; + g_timer_tsc = 5000; return; }
@@ -119,24 +118,24 @@ { u32 fsb;
- fsb = car_get_var(g_timer_fsb); + fsb = g_timer_fsb; if (fsb > 0) return fsb;
resolve_timebase(); - return car_get_var(g_timer_fsb); + return g_timer_fsb; }
unsigned long tsc_freq_mhz(void) { u32 tsc;
- tsc = car_get_var(g_timer_tsc); + tsc = g_timer_tsc; if (tsc > 0) return tsc;
resolve_timebase(); - return car_get_var(g_timer_tsc); + return g_timer_tsc; }
/**