[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Disable ACPI PM timer to reduce S0ix power usage

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34506 )

Change subject: soc/intel/cannonlake: Disable ACPI PM timer to reduce S0ix power usage
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soc/intel/cannonlake: Disable ACPI PM timer to reduce S0ix power usage

This patch overrides EnableTcoTimer FSP UPD default value based on
PmTimerDisabled coreboot devcietree config.

BRANCH=none
BUG=b:138152075

Change-Id: I347c15c7b65fb4c19b9680f127980d4ddab8df51
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34506
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
Reviewed-by: Aamir Bohra 
Reviewed-by: V Sowmya 
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 3 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  Aamir Bohra: Looks good to me, approved
  V Sowmya: Looks good to me, approved

diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index f696f79..3cc426a 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -367,6 +367,9 @@
    params->PchPwrOptEnable = config->dmipwroptimize;
    params->SataPwrOptEnable = config->satapwroptimize;

+	/* Disable PCH ACPI timer */
+	params->EnableTcoTimer = !config->PmTimerDisabled;
+
    /* Apply minimum assertion width settings if non-zero */
    if (config->PchPmSlpS3MinAssert)
    	params->PchPmSlpS3MinAssert = config->PchPmSlpS3MinAssert;