26 Apr
2021
26 Apr
'21
7:08 p.m.
Attention is currently required from: Raul Rangel. Eric Peers has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52673 )
Change subject: mb/google/guybrush: Fix EC SCI configuration ......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52673/comment/d6be6918_969e16e8 PS2, Line 14: Cezanne has added a new event source that directly exposes the SCI bit. does this mean we should abstract this logic to chipset rather than mainboard?
is this also a problem for mancomb?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I764b9ec202376d5124331a320767cbf79371dc07
Gerrit-Change-Number: 52673
Gerrit-PatchSet: 2
Gerrit-Owner: Raul Rangel rrangel@chromium.org
Gerrit-Reviewer: Karthik Ramasubramanian kramasub@google.com
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