Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56784 )
Change subject: mb/pcengines/apu2/romstage: use proper GPIO configuration API ......................................................................
mb/pcengines/apu2/romstage: use proper GPIO configuration API
Also remove the unused amdblocks/acpimmio.h include in gpio_ftns.c.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Tested-by: Michał Kopeć michal.kopec@3mdeb.com Change-Id: If121941c8a6ba88913653192740997aeef426548 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56784 Reviewed-by: Michał Żygowski michal.zygowski@3mdeb.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/pcengines/apu2/gpio_ftns.c M src/mainboard/pcengines/apu2/romstage.c 2 files changed, 44 insertions(+), 54 deletions(-)
Approvals: build bot (Jenkins): Verified Michał Żygowski: Looks good to me, approved
diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.c b/src/mainboard/pcengines/apu2/gpio_ftns.c index 28b9a74..1fd6fda 100644 --- a/src/mainboard/pcengines/apu2/gpio_ftns.c +++ b/src/mainboard/pcengines/apu2/gpio_ftns.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <amdblocks/acpimmio.h> #include <gpio.h> #include "gpio_ftns.h"
diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index 09a0309..9b1435a 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -2,6 +2,8 @@
#include <stdint.h> #include <amdblocks/acpimmio.h> +#include <amdblocks/gpio_banks.h> +#include <amdblocks/gpio_defs.h> #include <device/pci_def.h> #include <device/pci_ops.h> #include <gpio.h> @@ -28,63 +30,52 @@ pm_write8(0xea, 1); }
-static void pin_input(gpio_t gpio, u8 iomux_ftn) -{ - iomux_write8(gpio, iomux_ftn); - gpio_input(gpio); -} +const struct soc_amd_gpio gpio_common[] = { + /* Output disabled, pull up/down disabled */ + PAD_CFG_STRUCT(GPIO_49, Function2, PAD_PULL(PULL_NONE)), + PAD_CFG_STRUCT(GPIO_50, Function2, PAD_PULL(PULL_NONE)), + PAD_CFG_STRUCT(GPIO_71, Function0, PAD_PULL(PULL_NONE)), + /* Output enabled, value low, pull up/down disabled */ + PAD_CFG_STRUCT(GPIO_57, Function1, PAD_OUTPUT(LOW)), + PAD_CFG_STRUCT(GPIO_58, Function1, PAD_OUTPUT(LOW)), + PAD_CFG_STRUCT(GPIO_59, Function3, PAD_OUTPUT(LOW)), + /* Output enabled, value high, pull up/down disabled */ + PAD_CFG_STRUCT(GPIO_51, Function2, PAD_OUTPUT(HIGH)), + PAD_CFG_STRUCT(GPIO_55, Function3, PAD_OUTPUT(HIGH)), + PAD_CFG_STRUCT(GPIO_64, Function2, PAD_OUTPUT(HIGH)), + PAD_CFG_STRUCT(GPIO_68, Function0, PAD_OUTPUT(HIGH)), +};
-static void pin_low(gpio_t gpio, u8 iomux_ftn) -{ - iomux_write8(gpio, iomux_ftn); - gpio_output(gpio, 0); -} +const struct soc_amd_gpio gpio_apu2[] = { + /* Output disabled, pull up/down disabled */ + PAD_CFG_STRUCT(GPIO_32, Function0, PAD_PULL(PULL_NONE)), +};
-static void pin_high(gpio_t gpio, u8 iomux_ftn) -{ - iomux_write8(gpio, iomux_ftn); - gpio_output(gpio, 1); -} +const struct soc_amd_gpio gpio_apu34[] = { + /* Output disabled, pull up/down disabled */ + PAD_CFG_STRUCT(GPIO_32, Function0, PAD_PULL(PULL_NONE)), + /* Output enabled, value low, pull up/down disabled */ + PAD_CFG_STRUCT(GPIO_33, Function0, PAD_OUTPUT(LOW)), +}; + +const struct soc_amd_gpio gpio_apu5[] = { + /* Output disabled, pull up/down disabled */ + PAD_CFG_STRUCT(GPIO_22, Function0, PAD_PULL(PULL_NONE)), + /* Output enabled, value high, pull up/down disabled */ + PAD_CFG_STRUCT(GPIO_32, Function0, PAD_OUTPUT(HIGH)), + PAD_CFG_STRUCT(GPIO_33, Function0, PAD_OUTPUT(HIGH)), +};
static void early_lpc_init(void) { - // - // Configure output disabled, pull up/down disabled - // + program_gpios(gpio_common, ARRAY_SIZE(gpio_common)); + + if (CONFIG(BOARD_PCENGINES_APU2)) + program_gpios(gpio_apu2, ARRAY_SIZE(gpio_apu2)); + + if (CONFIG(BOARD_PCENGINES_APU3) || CONFIG(BOARD_PCENGINES_APU4)) + program_gpios(gpio_apu34, ARRAY_SIZE(gpio_apu34)); + if (CONFIG(BOARD_PCENGINES_APU5)) - pin_input(GPIO_22, Function0); - - if (CONFIG(BOARD_PCENGINES_APU2) || - CONFIG(BOARD_PCENGINES_APU3) || - CONFIG(BOARD_PCENGINES_APU4)) { - pin_input(GPIO_32, Function0); - } - - pin_input(GPIO_49, Function2); - pin_input(GPIO_50, Function2); - pin_input(GPIO_71, Function0); - - // - // Configure output enabled, value low, pull up/down disabled - // - if (CONFIG(BOARD_PCENGINES_APU3) || - CONFIG(BOARD_PCENGINES_APU4)) { - pin_low(GPIO_33, Function0); - } - pin_low(GPIO_57, Function1); - pin_low(GPIO_58, Function1); - pin_low(GPIO_59, Function3); - - // - // Configure output enabled, value high, pull up/down disabled - // - if (CONFIG(BOARD_PCENGINES_APU5)) { - pin_high(GPIO_32, Function0); - pin_high(GPIO_33, Function0); - } - - pin_high(GPIO_51, Function2); - pin_high(GPIO_55, Function3); - pin_high(GPIO_64, Function2); - pin_high(GPIO_68, Function0); + program_gpios(gpio_apu5, ARRAY_SIZE(gpio_apu5)); }