[coreboot-gerrit] Change in coreboot[master]: HACK: Enable PCIe refclk 100M

[Qizhong Cheng (Code Review)]

Qizhong Cheng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46610 )

Change subject: HACK: Enable PCIe refclk 100M
......................................................................

HACK: Enable PCIe refclk 100M

A temporary patch for PCIe compliance test.
Set GPIO65 pinmux for PCIe function which is clkreq#.

Signed-off-by: mtk20626 
Change-Id: I7167d9c47d35b711e268d839ce988c43c077c45e
---
M src/soc/mediatek/mt8192/usb.c
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/46610/1

diff --git a/src/soc/mediatek/mt8192/usb.c b/src/soc/mediatek/mt8192/usb.c
index 44f2f15..ddba82e 100644
--- a/src/soc/mediatek/mt8192/usb.c
+++ b/src/soc/mediatek/mt8192/usb.c
@@ -12,4 +12,5 @@
    /* power on SSUSB SRAM FIFO */
    setbits32(REG_SPM_POWERON_CONFIG_EN, 0xB160001);
    clrbits32(REG_SPM_SSPM_PWR_CON, 0x000001FF);
+	setbits32(IO_PHYS + GPIO_BASE + 0x380, 0x33);
 }