Attention is currently required from: Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59509 )
Change subject: soc/intel/common/thermal: Refactor thermal block to improve reusability ......................................................................
Patch Set 6:
(1 comment)
File src/soc/intel/common/block/thermal/Kconfig:
https://review.coreboot.org/c/coreboot/+/59509/comment/53d98d95_2b1d0365 PS4, Line 7: config SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV : bool : default n : select SOC_INTEL_COMMON_BLOCK_THERMAL : help : This option allows to configure PCH thermal registers using Thermal PCI device : for chipsets till Ice Lake PCH. : : config SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC : bool : default n : select SOC_INTEL_COMMON_BLOCK_THERMAL : help : This option allows to configure PCH thermal registers using PMC PWRMBASE : for chipsets since Tiger Lake PCH.
@Eric, can you please help me to understand this little better.
config SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV bool default n select SOC_INTEL_COMMON_BLOCK_THERMAL help This option allows to configure PCH thermal registers using Thermal PCI device for chipsets till Ice Lake PCH.
config SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC bool default y select SOC_INTEL_COMMON_BLOCK_THERMAL help This option allows to configure PCH thermal registers using PMC PWRMBASE for chipsets since Tiger Lake PCH.
if !SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC config SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV bool default y select SOC_INTEL_COMMON_BLOCK_THERMAL help This option allows to configure PCH thermal registers using Thermal PCI device for chipsets till Ice Lake PCH. endif