Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38748 )
Change subject: soc/intel/common/block/lpc: Add support to allow all UART options ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/38748/1/src/soc/intel/common/block/... File src/soc/intel/common/block/lpc/Kconfig:
https://review.coreboot.org/c/coreboot/+/38748/1/src/soc/intel/common/block/... PS1, Line 17: prompt "Index for COMA UART"
Right now this information is not in the device tree so we would have to add it. Right now only the generic ranges can be defined there. The code as it is always opens the 3f8 window and opens the 2f8 window if SOC_INTEL_COMMON_BLOCK_LPC_COMB_UART is defined. Which obviously isn't a very good idea.
Not obvious to me, please elaborate. It's not like the user could plug an external UART chip on the LPC, is it? Is there a mainboard that uses this common code and has an i/o based UART at different addresses?
https://review.coreboot.org/c/coreboot/+/38748/1/src/soc/intel/common/block/... PS1, Line 18: DRIVERS_UART_8250IO
TYou only need to open up the com port windows if an IO based UART is used. […]
I know the technical background, but not what it has to do with coreboot's console. DRIVERS_UART_8250IO is a software feature and not about the hardware.