Xiang Wang has uploaded this change for review. ( https://review.coreboot.org/29024
Change subject: riscv: add support to block smp in each stage ......................................................................
riscv: add support to block smp in each stage
Change-Id: I8d508c3d0f65a022010e74f8edad7ad2cfdc7dee Signed-off-by: Xiang Wang wxjstz@126.com --- M src/arch/riscv/boot.c M src/soc/sifive/fu540/Kconfig M src/soc/sifive/fu540/Makefile.inc 3 files changed, 12 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/29024/1
diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c index d7233fe..3aa0ca3 100644 --- a/src/arch/riscv/boot.c +++ b/src/arch/riscv/boot.c @@ -19,7 +19,7 @@ #include <arch/encoding.h> #include <rules.h> #include <console/console.h> - +#include <arch/smp/smp.h> /* * A pointer to the Flattened Device Tree passed to coreboot by the boot ROM. * Presumably this FDT is also in ROM. @@ -28,7 +28,7 @@ */ const void *rom_fdt;
-void arch_prog_run(struct prog *prog) +static void arch_prog_run_help(struct prog *prog) { void (*doit)(void *) = prog_entry(prog); void riscvpayload(const void *fdt, void *payload); @@ -49,6 +49,11 @@ doit(prog_entry_arg(prog)); }
+void arch_prog_run(struct prog *prog) +{ + smp_resume((void (*)(void *))arch_prog_run_help, prog); +} + int arch_supports_bounce_buffer(void) { return 0; diff --git a/src/soc/sifive/fu540/Kconfig b/src/soc/sifive/fu540/Kconfig index bee8292..81403be 100644 --- a/src/soc/sifive/fu540/Kconfig +++ b/src/soc/sifive/fu540/Kconfig @@ -39,4 +39,8 @@ string default "medany"
+config RISCV_HART_NUM + int + default 5 + endif diff --git a/src/soc/sifive/fu540/Makefile.inc b/src/soc/sifive/fu540/Makefile.inc index e2bdd03..fef859d 100644 --- a/src/soc/sifive/fu540/Makefile.inc +++ b/src/soc/sifive/fu540/Makefile.inc @@ -19,6 +19,7 @@ bootblock-y += bootblock.c
romstage-y += uart.c +romstage-y += clint.c romstage-y += media.c romstage-y += sdram.c romstage-y += cbmem.c