Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/25341
Change subject: mb/google/octopus/variants/baseboard: Set PL1 and PL2 value ......................................................................
mb/google/octopus/variants/baseboard: Set PL1 and PL2 value
This patch sets PL1 value to ~6W. Here, 8W setting gives a run-time 6W actual measured power. Also, this patch sets PL2 value to 15W.
BUG=None BRANCH=None TEST=Build and read the MSR 0x610.
Change-Id: I2439a49b9917db0d9b05f333ce1c35003da493f6 Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/octopus/variants/baseboard/devicetree.cb 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/25341/1
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index fb8fe54..5aafa6f 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -75,6 +75,13 @@ register "gpe0_dw2" = "PMC_GPE_N_95_64" register "gpe0_dw3" = "PMC_GPE_NW_31_0"
+ # PL1 override 8000 mW: Due to error in the energy calculation for + # current VR solution. Experiments show that SoC TDP max (6W) can + # be reached when RAPL PL1 is set to 8W. + register "tdp_pl1_override_mw" = "8000" + # Set RAPL PL2 to 15W. + register "tdp_pl2_override_mw" = "15000" + # Minimum SLP S3 assertion width 28ms. register "slp_s3_assertion_width_usecs" = "28000"