Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/27204
Change subject: nb/intel/i945: Add C1DRBs when channel B is empty ......................................................................
nb/intel/i945: Add C1DRBs when channel B is empty
C1DRBs must be programmed with the same value as C0DRB3 when the channel B is empty. If channels are interleave, C0DRB* is equal to C1DRB*.
Change-Id: Ic26103aac7f920e5696b445e125d33405df4f43b Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/i945/raminit.c 1 file changed, 16 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/27204/1
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 6719961..615832d 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -1189,25 +1189,27 @@ for (i = 0; i < 2 * DIMM_SOCKETS; i++) { cum0 += sysinfo->banksize[i]; MCHBAR8(C0DRB0+i) = cum0; + /* If interleaved C0DRB's = C1DRB's */ + if (sysinfo->interleaved) + MCHBAR8(C1DRB0+i) = cum0; + } + + /* If channel 1 is empty, all of the C1DRBs are programmed with the same value as C0DRB3 */ + if (sysinfo->dimm[2] == SYSINFO_DIMM_NOT_POPULATED && + sysinfo->dimm[3] == SYSINFO_DIMM_NOT_POPULATED) { + for (i = 0; i < 2 * DIMM_SOCKETS; i++) + MCHBAR8(C1DRB0+i) = cum1; }
/* Assume we continue in Channel 1 where we stopped in Channel 0 */ cum1 = cum0;
- /* Exception: Interleaved starts from the beginning */ - if (sysinfo->interleaved) - cum1 = 0; - -#if 0 - /* Exception: Channel 1 is not populated. C1DRB stays zero */ - if (sysinfo->dimm[2] == SYSINFO_DIMM_NOT_POPULATED && - sysinfo->dimm[3] == SYSINFO_DIMM_NOT_POPULATED) - cum1 = 0; -#endif - - for (i = 0; i < 2 * DIMM_SOCKETS; i++) { - cum1 += sysinfo->banksize[i + 4]; - MCHBAR8(C1DRB0+i) = cum1; + if (!(sysinfo->interleaved) && (sysinfo->dimm[2] != SYSINFO_DIMM_NOT_POPULATED || + sysinfo->dimm[3] != SYSINFO_DIMM_NOT_POPULATED) { + for (i = 0; i < 2 * DIMM_SOCKETS; i++) { + cum1 += sysinfo->banksize[i + 4]; + MCHBAR8(C1DRB0+i) = cum1; + } }
/* Set TOLUD Top Of Low Usable DRAM */